test
This commit is contained in:
16
Test2/Core/Inc/adc.h
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16
Test2/Core/Inc/adc.h
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/*
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* adc.h
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*
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* Created on: Sep 6, 2017
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* Author: dmitrijs
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*/
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#ifndef ADC_H_
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#define ADC_H_
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void Adc_Init(void);
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unsigned short Adc_Read(unsigned char ch);
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void Get_Analog_Var(void);
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#endif /* ADC_H_ */
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73
Test2/Core/Inc/can.h
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73
Test2/Core/Inc/can.h
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/*
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* CAN.h
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*
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* Created on: Dec 04, 2018
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* Author: v0stap
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*/
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#ifndef _CAN_H_
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#define _CAN_H_
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#define CAN_ID_STD 0x00000000U
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#define CAN_ID_EXT 0x00000004U
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#define CAN_RTR_DATA 0x00000000U
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#define CAN_RTR_REMOTE 0x00000002U
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#define STD_FORMAT 0
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#define EXTD_FORMAT 1
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#define DATA_FRAME 0
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#define REMOTE_FRAME 1
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#define CAN_250KBS 0x031c000b
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#define CAN_500KBS 0x031c0005
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#define CAN_1000KBS 0x031c0002
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typedef struct {
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uint32_t id; // 29 bit identifier
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uint8_t data[8]; // Data field
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uint8_t lenght; // Length of data field in bytes
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uint8_t format; // 0 - STANDART, 1- EXTENDED
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uint8_t frame; // 0 - DATA FRAME, 1 - REMOTE FRAME
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} can_msg_typedef;
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typedef struct {
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can_msg_typedef data[16];
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uint8_t todo;
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uint8_t corent;
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uint8_t done;
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} can_buffer_typedef;
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typedef struct {
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CAN_TypeDef *can_port;
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uint8_t mode;
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uint32_t speed;
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uint8_t filter;
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uint8_t rx_pin;
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uint8_t tx_pin;
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GPIO_TypeDef *port;
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uint8_t tx_ready;
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uint8_t rx_ready;
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} can_config_typedef;
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void CAN_Init(void);
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void CAN_Setup(uint32_t speed);
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void CAN_Start(void);
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void CAN_Wait_Ready(void);
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void CAN_Send_Msg(can_msg_typedef *msg);
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void CAN_Read_Msg(can_msg_typedef *msg);
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void CAN_Write_Filter(uint32_t id, uint8_t format);
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void CAN_Send_TX_Buffer(void);
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void CAN_Add_TX_Buffer(can_msg_typedef *data);
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void CAN_Add_RX_Buffer(void);
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void CAN_Read_RX_Buffer(can_msg_typedef *data);
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extern can_msg_typedef CAN_TX_Msg; // CAN message for transmit
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extern can_msg_typedef CAN_RX_Msg; // CAN received message
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extern uint8_t CAN_TX_Rdy; // CAN hardware ready to transmit a message
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extern uint8_t CAN_RX_Rdy; // CAN hardware received a message
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extern uint32_t CAN_Speed; // CAN Speed / CAN BTR register
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extern can_buffer_typedef CAN_TX_Buffer;
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extern can_buffer_typedef CAN_RX_Buffer;
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#endif // _CAN_H_
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19
Test2/Core/Inc/haltech.h
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19
Test2/Core/Inc/haltech.h
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/*
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* mazda_can.h
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*
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* Created on: Mar 17, 2022
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* Author: v0stap
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*/
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#ifndef INC_HALTECH_H_
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#define INC_HALTECH_H_
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void Haltech_App (uint32_t id);
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void Haltech_Send_Analog(uint32_t id);
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void Haltech_Send_Digital1(uint32_t id);
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void Haltech_Send_Digital2(uint32_t id);
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void Haltech_Send_Keap_Alive(uint32_t id);
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void Haltech_Write_Digital(can_msg_typedef *section);
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#endif /* INC_HALTECH_H_ */
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97
Test2/Core/Inc/main.h
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97
Test2/Core/Inc/main.h
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/* USER CODE BEGIN Header */
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/**
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******************************************************************************
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* @file : main.h
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* @brief : Header for main.c file.
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* This file contains the common defines of the application.
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2025 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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/* USER CODE END Header */
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __MAIN_H
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#define __MAIN_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "stm32f0xx_hal.h"
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/* Private includes ----------------------------------------------------------*/
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/* USER CODE BEGIN Includes */
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#include <stdio.h>
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#include "adc.h"
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#include "can.h"
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#include "variables.h"
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#include "haltech.h"
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#include "timers.h"
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#include "math.h"
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/* USER CODE END Includes */
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/* Exported types ------------------------------------------------------------*/
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/* USER CODE BEGIN ET */
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/* USER CODE END ET */
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/* Exported constants --------------------------------------------------------*/
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/* USER CODE BEGIN EC */
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/* USER CODE END EC */
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/* Exported macro ------------------------------------------------------------*/
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/* USER CODE BEGIN EM */
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#define GPIO_TOGGLE_PIN(port, pin) ((port)->ODR ^= (pin))
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#define GPIO_READ_PIN(port, pin) ((port)->IDR & (pin))
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#define GPIO_SET_PIN(port, pin) ((port)->BSRR = (pin))
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#define GPIO_CLEAR_PIN(port, pin) ((port)->BSRR = (pin << 16u))
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/* USER CODE END EM */
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void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim);
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/* Exported functions prototypes ---------------------------------------------*/
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void Error_Handler(void);
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/* USER CODE BEGIN EFP */
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/* USER CODE END EFP */
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/* Private defines -----------------------------------------------------------*/
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#define OUT0_Pin GPIO_PIN_4
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#define OUT0_GPIO_Port GPIOA
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#define OUT1_Pin GPIO_PIN_5
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#define OUT1_GPIO_Port GPIOA
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#define OUT2_Pin GPIO_PIN_6
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#define OUT2_GPIO_Port GPIOA
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#define OUT3_Pin GPIO_PIN_7
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#define OUT3_GPIO_Port GPIOA
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#define IN3_Pin GPIO_PIN_14
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#define IN3_GPIO_Port GPIOB
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#define IN0_Pin GPIO_PIN_8
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#define IN0_GPIO_Port GPIOA
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#define IN1_Pin GPIO_PIN_15
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#define IN1_GPIO_Port GPIOA
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#define IN2_Pin GPIO_PIN_5
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#define IN2_GPIO_Port GPIOB
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/* USER CODE BEGIN Private defines */
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extern var_typedef var;
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/* USER CODE END Private defines */
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#ifdef __cplusplus
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}
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#endif
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#endif /* __MAIN_H */
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14
Test2/Core/Inc/math.h
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14
Test2/Core/Inc/math.h
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/*
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* math.h
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*
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* Created on: 2 февр. 2026 г.
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* Author: v0stap
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*/
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#ifndef INC_MATH_H_
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#define INC_MATH_H_
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uint16_t map16_t(uint16_t x, uint16_t in_min, uint16_t in_max, uint16_t out_min, uint16_t out_max);
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uint16_t LPF(unsigned short lpf_c, unsigned short value, unsigned short old_value);
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#endif /* INC_MATH_H_ */
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322
Test2/Core/Inc/stm32f0xx_hal_conf.h
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322
Test2/Core/Inc/stm32f0xx_hal_conf.h
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/* USER CODE BEGIN Header */
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/**
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******************************************************************************
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* @file stm32f0xx_hal_conf.h
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* @brief HAL configuration file.
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2016 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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/* USER CODE END Header */
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __STM32F0xx_HAL_CONF_H
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#define __STM32F0xx_HAL_CONF_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Exported types ------------------------------------------------------------*/
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/* Exported constants --------------------------------------------------------*/
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/* ########################## Module Selection ############################## */
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/**
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* @brief This is the list of modules to be used in the HAL driver
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*/
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#define HAL_MODULE_ENABLED
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#define HAL_ADC_MODULE_ENABLED
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/*#define HAL_CRYP_MODULE_ENABLED */
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/*#define HAL_CAN_MODULE_ENABLED */
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/*#define HAL_CEC_MODULE_ENABLED */
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/*#define HAL_COMP_MODULE_ENABLED */
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/*#define HAL_CRC_MODULE_ENABLED */
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/*#define HAL_CRYP_MODULE_ENABLED */
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/*#define HAL_TSC_MODULE_ENABLED */
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/*#define HAL_DAC_MODULE_ENABLED */
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/*#define HAL_I2S_MODULE_ENABLED */
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/*#define HAL_IWDG_MODULE_ENABLED */
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/*#define HAL_LCD_MODULE_ENABLED */
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/*#define HAL_LPTIM_MODULE_ENABLED */
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/*#define HAL_RNG_MODULE_ENABLED */
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/*#define HAL_RTC_MODULE_ENABLED */
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/*#define HAL_SPI_MODULE_ENABLED */
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#define HAL_TIM_MODULE_ENABLED
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#define HAL_UART_MODULE_ENABLED
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/*#define HAL_USART_MODULE_ENABLED */
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/*#define HAL_IRDA_MODULE_ENABLED */
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/*#define HAL_SMARTCARD_MODULE_ENABLED */
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/*#define HAL_SMBUS_MODULE_ENABLED */
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/*#define HAL_WWDG_MODULE_ENABLED */
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#define HAL_PCD_MODULE_ENABLED
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#define HAL_CORTEX_MODULE_ENABLED
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#define HAL_DMA_MODULE_ENABLED
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#define HAL_FLASH_MODULE_ENABLED
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#define HAL_GPIO_MODULE_ENABLED
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#define HAL_EXTI_MODULE_ENABLED
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#define HAL_PWR_MODULE_ENABLED
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#define HAL_RCC_MODULE_ENABLED
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#define HAL_I2C_MODULE_ENABLED
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/* ########################## HSE/HSI Values adaptation ##################### */
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/**
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* @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
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* This value is used by the RCC HAL module to compute the system frequency
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* (when HSE is used as system clock source, directly or through the PLL).
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*/
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#if !defined (HSE_VALUE)
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#define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */
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#endif /* HSE_VALUE */
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/**
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* @brief In the following line adjust the External High Speed oscillator (HSE) Startup
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* Timeout value
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*/
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#if !defined (HSE_STARTUP_TIMEOUT)
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#define HSE_STARTUP_TIMEOUT ((uint32_t)100) /*!< Time out for HSE start up, in ms */
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#endif /* HSE_STARTUP_TIMEOUT */
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/**
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* @brief Internal High Speed oscillator (HSI) value.
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* This value is used by the RCC HAL module to compute the system frequency
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* (when HSI is used as system clock source, directly or through the PLL).
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*/
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#if !defined (HSI_VALUE)
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#define HSI_VALUE ((uint32_t)8000000) /*!< Value of the Internal oscillator in Hz*/
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#endif /* HSI_VALUE */
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/**
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* @brief In the following line adjust the Internal High Speed oscillator (HSI) Startup
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* Timeout value
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*/
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#if !defined (HSI_STARTUP_TIMEOUT)
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#define HSI_STARTUP_TIMEOUT ((uint32_t)5000) /*!< Time out for HSI start up */
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#endif /* HSI_STARTUP_TIMEOUT */
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/**
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* @brief Internal High Speed oscillator for ADC (HSI14) value.
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*/
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#if !defined (HSI14_VALUE)
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#define HSI14_VALUE ((uint32_t)14000000) /*!< Value of the Internal High Speed oscillator for ADC in Hz.
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The real value may vary depending on the variations
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in voltage and temperature. */
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#endif /* HSI14_VALUE */
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/**
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* @brief Internal High Speed oscillator for USB (HSI48) value.
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*/
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#if !defined (HSI48_VALUE)
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#define HSI48_VALUE ((uint32_t)48000000) /*!< Value of the Internal High Speed oscillator for USB in Hz.
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The real value may vary depending on the variations
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in voltage and temperature. */
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#endif /* HSI48_VALUE */
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/**
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* @brief Internal Low Speed oscillator (LSI) value.
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*/
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#if !defined (LSI_VALUE)
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#define LSI_VALUE ((uint32_t)40000)
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#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz
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The real value may vary depending on the variations
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in voltage and temperature. */
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/**
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* @brief External Low Speed oscillator (LSI) value.
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*/
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#if !defined (LSE_VALUE)
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#define LSE_VALUE ((uint32_t)32768) /*!< Value of the External Low Speed oscillator in Hz */
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#endif /* LSE_VALUE */
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||||
/**
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* @brief Time out for LSE start up value in ms.
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*/
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#if !defined (LSE_STARTUP_TIMEOUT)
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#define LSE_STARTUP_TIMEOUT ((uint32_t)5000) /*!< Time out for LSE start up, in ms */
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#endif /* LSE_STARTUP_TIMEOUT */
|
||||
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||||
/* Tip: To avoid modifying this file each time you need to use different HSE,
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||||
=== you can define the HSE value in your toolchain compiler preprocessor. */
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||||
/* ########################### System Configuration ######################### */
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/**
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* @brief This is the HAL system configuration section
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*/
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#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */
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#define TICK_INT_PRIORITY ((uint32_t)3) /*!< tick interrupt priority (lowest by default) */
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/* Warning: Must be set to higher priority for HAL_Delay() */
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/* and HAL_GetTick() usage under interrupt context */
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#define USE_RTOS 0
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#define PREFETCH_ENABLE 1
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#define INSTRUCTION_CACHE_ENABLE 0
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#define DATA_CACHE_ENABLE 0
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#define USE_SPI_CRC 0U
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#define USE_HAL_ADC_REGISTER_CALLBACKS 0U /* ADC register callback disabled */
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#define USE_HAL_CAN_REGISTER_CALLBACKS 0U /* CAN register callback disabled */
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#define USE_HAL_COMP_REGISTER_CALLBACKS 0U /* COMP register callback disabled */
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#define USE_HAL_CEC_REGISTER_CALLBACKS 0U /* CEC register callback disabled */
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#define USE_HAL_DAC_REGISTER_CALLBACKS 0U /* DAC register callback disabled */
|
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#define USE_HAL_I2C_REGISTER_CALLBACKS 0U /* I2C register callback disabled */
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||||
#define USE_HAL_SMBUS_REGISTER_CALLBACKS 0U /* SMBUS register callback disabled */
|
||||
#define USE_HAL_UART_REGISTER_CALLBACKS 0U /* UART register callback disabled */
|
||||
#define USE_HAL_USART_REGISTER_CALLBACKS 0U /* USART register callback disabled */
|
||||
#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U /* IRDA register callback disabled */
|
||||
#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U /* SMARTCARD register callback disabled */
|
||||
#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U /* WWDG register callback disabled */
|
||||
#define USE_HAL_RTC_REGISTER_CALLBACKS 0U /* RTC register callback disabled */
|
||||
#define USE_HAL_SPI_REGISTER_CALLBACKS 0U /* SPI register callback disabled */
|
||||
#define USE_HAL_I2S_REGISTER_CALLBACKS 0U /* I2S register callback disabled */
|
||||
#define USE_HAL_TIM_REGISTER_CALLBACKS 0U /* TIM register callback disabled */
|
||||
#define USE_HAL_TSC_REGISTER_CALLBACKS 0U /* TSC register callback disabled */
|
||||
#define USE_HAL_PCD_REGISTER_CALLBACKS 0U /* PCD register callback disabled */
|
||||
|
||||
/* ########################## Assert Selection ############################## */
|
||||
/**
|
||||
* @brief Uncomment the line below to expanse the "assert_param" macro in the
|
||||
* HAL drivers code
|
||||
*/
|
||||
/* #define USE_FULL_ASSERT 1U */
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
/**
|
||||
* @brief Include module's header file
|
||||
*/
|
||||
|
||||
#ifdef HAL_RCC_MODULE_ENABLED
|
||||
#include "stm32f0xx_hal_rcc.h"
|
||||
#endif /* HAL_RCC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_GPIO_MODULE_ENABLED
|
||||
#include "stm32f0xx_hal_gpio.h"
|
||||
#endif /* HAL_GPIO_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_EXTI_MODULE_ENABLED
|
||||
#include "stm32f0xx_hal_exti.h"
|
||||
#endif /* HAL_EXTI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DMA_MODULE_ENABLED
|
||||
#include "stm32f0xx_hal_dma.h"
|
||||
#endif /* HAL_DMA_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CORTEX_MODULE_ENABLED
|
||||
#include "stm32f0xx_hal_cortex.h"
|
||||
#endif /* HAL_CORTEX_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_ADC_MODULE_ENABLED
|
||||
#include "stm32f0xx_hal_adc.h"
|
||||
#endif /* HAL_ADC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CAN_MODULE_ENABLED
|
||||
#include "stm32f0xx_hal_can.h"
|
||||
#endif /* HAL_CAN_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CEC_MODULE_ENABLED
|
||||
#include "stm32f0xx_hal_cec.h"
|
||||
#endif /* HAL_CEC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_COMP_MODULE_ENABLED
|
||||
#include "stm32f0xx_hal_comp.h"
|
||||
#endif /* HAL_COMP_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CRC_MODULE_ENABLED
|
||||
#include "stm32f0xx_hal_crc.h"
|
||||
#endif /* HAL_CRC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DAC_MODULE_ENABLED
|
||||
#include "stm32f0xx_hal_dac.h"
|
||||
#endif /* HAL_DAC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_FLASH_MODULE_ENABLED
|
||||
#include "stm32f0xx_hal_flash.h"
|
||||
#endif /* HAL_FLASH_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_I2C_MODULE_ENABLED
|
||||
#include "stm32f0xx_hal_i2c.h"
|
||||
#endif /* HAL_I2C_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_I2S_MODULE_ENABLED
|
||||
#include "stm32f0xx_hal_i2s.h"
|
||||
#endif /* HAL_I2S_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_IRDA_MODULE_ENABLED
|
||||
#include "stm32f0xx_hal_irda.h"
|
||||
#endif /* HAL_IRDA_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_IWDG_MODULE_ENABLED
|
||||
#include "stm32f0xx_hal_iwdg.h"
|
||||
#endif /* HAL_IWDG_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_PCD_MODULE_ENABLED
|
||||
#include "stm32f0xx_hal_pcd.h"
|
||||
#endif /* HAL_PCD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_PWR_MODULE_ENABLED
|
||||
#include "stm32f0xx_hal_pwr.h"
|
||||
#endif /* HAL_PWR_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_RTC_MODULE_ENABLED
|
||||
#include "stm32f0xx_hal_rtc.h"
|
||||
#endif /* HAL_RTC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SMARTCARD_MODULE_ENABLED
|
||||
#include "stm32f0xx_hal_smartcard.h"
|
||||
#endif /* HAL_SMARTCARD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SMBUS_MODULE_ENABLED
|
||||
#include "stm32f0xx_hal_smbus.h"
|
||||
#endif /* HAL_SMBUS_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SPI_MODULE_ENABLED
|
||||
#include "stm32f0xx_hal_spi.h"
|
||||
#endif /* HAL_SPI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_TIM_MODULE_ENABLED
|
||||
#include "stm32f0xx_hal_tim.h"
|
||||
#endif /* HAL_TIM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_TSC_MODULE_ENABLED
|
||||
#include "stm32f0xx_hal_tsc.h"
|
||||
#endif /* HAL_TSC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_UART_MODULE_ENABLED
|
||||
#include "stm32f0xx_hal_uart.h"
|
||||
#endif /* HAL_UART_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_USART_MODULE_ENABLED
|
||||
#include "stm32f0xx_hal_usart.h"
|
||||
#endif /* HAL_USART_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_WWDG_MODULE_ENABLED
|
||||
#include "stm32f0xx_hal_wwdg.h"
|
||||
#endif /* HAL_WWDG_MODULE_ENABLED */
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
#ifdef USE_FULL_ASSERT
|
||||
/**
|
||||
* @brief The assert_param macro is used for function's parameters check.
|
||||
* @param expr If expr is false, it calls assert_failed function
|
||||
* which reports the name of the source file and the source
|
||||
* line number of the call that failed.
|
||||
* If expr is true, it returns no value.
|
||||
* @retval None
|
||||
*/
|
||||
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
|
||||
/* Exported functions ------------------------------------------------------- */
|
||||
void assert_failed(uint8_t* file, uint32_t line);
|
||||
#else
|
||||
#define assert_param(expr) ((void)0U)
|
||||
#endif /* USE_FULL_ASSERT */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32F0xx_HAL_CONF_H */
|
||||
|
||||
63
Test2/Core/Inc/stm32f0xx_it.h
Normal file
63
Test2/Core/Inc/stm32f0xx_it.h
Normal file
@@ -0,0 +1,63 @@
|
||||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32f0xx_it.h
|
||||
* @brief This file contains the headers of the interrupt handlers.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2025 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F0xx_IT_H
|
||||
#define __STM32F0xx_IT_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Private includes ----------------------------------------------------------*/
|
||||
/* USER CODE BEGIN Includes */
|
||||
|
||||
/* USER CODE END Includes */
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN ET */
|
||||
|
||||
/* USER CODE END ET */
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/* USER CODE BEGIN EC */
|
||||
|
||||
/* USER CODE END EC */
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN EM */
|
||||
|
||||
/* USER CODE END EM */
|
||||
|
||||
/* Exported functions prototypes ---------------------------------------------*/
|
||||
void NMI_Handler(void);
|
||||
void HardFault_Handler(void);
|
||||
void SVC_Handler(void);
|
||||
void PendSV_Handler(void);
|
||||
void SysTick_Handler(void);
|
||||
void USB_IRQHandler(void);
|
||||
/* USER CODE BEGIN EFP */
|
||||
|
||||
/* USER CODE END EFP */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32F0xx_IT_H */
|
||||
22
Test2/Core/Inc/timers.h
Normal file
22
Test2/Core/Inc/timers.h
Normal file
@@ -0,0 +1,22 @@
|
||||
/*
|
||||
* timers.h
|
||||
*
|
||||
* Created on: 4 янв. 2026 г.
|
||||
* Author: v0stap
|
||||
*/
|
||||
|
||||
#ifndef INC_TIMERS_H_
|
||||
#define INC_TIMERS_H_
|
||||
#include "main.h"
|
||||
|
||||
void Timers_Init(void);
|
||||
void TIM1_Init(void);
|
||||
void TIM2_Init(void);
|
||||
void TIM3_Init(void);
|
||||
void TIM6_Init(void);
|
||||
void TIM7_Init(void);
|
||||
void TIM14_Init(void);
|
||||
void TIM15_Init(void);
|
||||
void TIM16_Init(void);
|
||||
void TIM17_Init(void);
|
||||
#endif /* INC_TIMERS_H_ */
|
||||
31
Test2/Core/Inc/variables.h
Normal file
31
Test2/Core/Inc/variables.h
Normal file
@@ -0,0 +1,31 @@
|
||||
/*
|
||||
* variables.h
|
||||
*
|
||||
* Created on: 22 дек. 2025 г.
|
||||
* Author: v0stap
|
||||
*/
|
||||
|
||||
#ifndef INC_VARIABLES_H_
|
||||
#define INC_VARIABLES_H_
|
||||
|
||||
typedef struct {
|
||||
uint16_t avi[4];
|
||||
uint16_t dvo_fr[4];
|
||||
uint16_t dvo_dt[4];
|
||||
uint16_t dvi_fr[4];
|
||||
uint16_t dvi_dt[4];
|
||||
uint8_t tim1_timeout;
|
||||
uint8_t tim2_timeout;
|
||||
uint8_t tim3_timeout;
|
||||
uint8_t tim15_timeout;
|
||||
uint8_t can_timeout;
|
||||
uint8_t conter;
|
||||
uint8_t timer;
|
||||
uint8_t buffer;
|
||||
uint8_t Send_Data_IRQ;
|
||||
} var_typedef;
|
||||
|
||||
typedef struct {
|
||||
|
||||
} config_typedef;
|
||||
#endif /* INC_VARIABLES_H_ */
|
||||
72
Test2/Core/Src/adc.c
Normal file
72
Test2/Core/Src/adc.c
Normal file
@@ -0,0 +1,72 @@
|
||||
/*
|
||||
* adc.c
|
||||
*
|
||||
* Created on: Sep 6, 2017
|
||||
* Author: dmitrijs
|
||||
*/
|
||||
|
||||
#include "main.h"
|
||||
|
||||
void Adc_Init(void) {
|
||||
|
||||
RCC->APB2ENR |= RCC_APB2ENR_ADCEN;
|
||||
ADC1->CFGR2 = (0x00000002 << 30); // pclk/4 -> 12Mhz
|
||||
ADC1->SMPR = 0x00000001; // Sample 7.5 adc cycles
|
||||
ADC1->CFGR1 = 0;
|
||||
/* (1) Ensure that ADEN = 0 */
|
||||
/* (2) Clear ADEN by setting ADDIS*/
|
||||
/* (3) Clear DMAEN */
|
||||
/* (4) Launch the calibration by setting ADCAL */
|
||||
/* (5) Wait until ADCAL=0 */
|
||||
if ((ADC1->CR & ADC_CR_ADEN) != 0) /* (1) */
|
||||
{
|
||||
ADC1->CR |= ADC_CR_ADDIS; /* (2) */
|
||||
}
|
||||
while ((ADC1->CR & ADC_CR_ADEN) != 0) {
|
||||
/* For robust implementation, add here time-out management */
|
||||
}
|
||||
ADC1->CFGR1 &= ~ADC_CFGR1_DMAEN; /* (3) */
|
||||
ADC1->CR |= ADC_CR_ADCAL; /* (4) */
|
||||
while ((ADC1->CR & ADC_CR_ADCAL) != 0) /* (5) */
|
||||
{
|
||||
/* For robust implementation, add here time-out management */
|
||||
}
|
||||
/* (1) Ensure that ADRDY = 0 */
|
||||
/* (2) Clear ADRDY */
|
||||
/* (3) Enable the ADC */
|
||||
/* (4) Wait until ADC ready */
|
||||
if ((ADC1->ISR & ADC_ISR_ADRDY) != 0) /* (1) */
|
||||
{
|
||||
ADC1->ISR |= ADC_ISR_ADRDY; /* (2) */
|
||||
}
|
||||
ADC1->CR |= ADC_CR_ADEN; /* (3) */
|
||||
while ((ADC1->ISR & ADC_ISR_ADRDY) == 0) /* (4) */
|
||||
{
|
||||
/*TODO For robust implementation, add here time-out management */
|
||||
}
|
||||
|
||||
ADC1->IER = 0;
|
||||
//NVIC_EnableIRQ(ADC1_IRQn);
|
||||
}
|
||||
|
||||
|
||||
|
||||
unsigned short Adc_Read(unsigned char ch) {
|
||||
unsigned short tmp;
|
||||
if (ADC1->ISR & ADC_ISR_EOC)
|
||||
tmp = ADC1->DR; //ADC1->ISR |= ADC_ISR_EOC; // clear EOC flag
|
||||
ADC1->CHSELR = (1 << ch); // select channel
|
||||
ADC1->CR |= ADC_CR_ADSTART;
|
||||
while ((~ADC1->ISR) & ADC_ISR_EOC)
|
||||
;
|
||||
ADC1->ISR |= ADC_ISR_EOC;
|
||||
tmp = ADC1->DR;
|
||||
return tmp;
|
||||
}
|
||||
void Get_Analog_Var(void) {
|
||||
var.avi[0] = LPF(700, Adc_Read(0), var.avi[0]);
|
||||
var.avi[1] = LPF(700, Adc_Read(1), var.avi[1]);
|
||||
var.avi[2] = LPF(700, Adc_Read(2), var.avi[2]);
|
||||
var.avi[3] = LPF(700, Adc_Read(3), var.avi[3]);
|
||||
|
||||
}
|
||||
281
Test2/Core/Src/can.c
Normal file
281
Test2/Core/Src/can.c
Normal file
@@ -0,0 +1,281 @@
|
||||
/*
|
||||
* CAN.c
|
||||
|
||||
*
|
||||
* Created on: Dec 04, 2018
|
||||
* Author: v0stap
|
||||
*/
|
||||
|
||||
#include "main.h"
|
||||
#include "can.h"
|
||||
|
||||
can_msg_typedef CAN_TX_Msg; // CAN message for transmit
|
||||
can_msg_typedef CAN_RX_Msg; // CAN received message
|
||||
uint8_t CAN_TX_Rdy = 0; // CAN hardware ready to transmit a message
|
||||
uint8_t CAN_RX_Rdy = 0; // CAN hardware message received
|
||||
uint32_t CAN_Speed = CAN_500KBS; // CAN Speed / CAN BTR register
|
||||
can_buffer_typedef CAN_TX_Buffer, CAN_RX_Buffer;
|
||||
uint8_t CAN_Filter_Idx = 0; // CAN filter index
|
||||
|
||||
void CAN_Init(void) {
|
||||
CAN_TX_Buffer.todo = 0;
|
||||
CAN_TX_Buffer.corent = 0;
|
||||
CAN_TX_Buffer.done = 0;
|
||||
CAN_RX_Buffer.todo = 0;
|
||||
CAN_RX_Buffer.corent = 0;
|
||||
CAN_RX_Buffer.done = 0;
|
||||
CAN_Setup(CAN_1000KBS);
|
||||
CAN_Write_Filter(0x101, EXTD_FORMAT);
|
||||
CAN_Write_Filter(0x2D0, EXTD_FORMAT);
|
||||
CAN_Write_Filter(0x2D2, EXTD_FORMAT);
|
||||
//CAN_Write_Filter(0x630, STD_FORMAT);
|
||||
//CAN_Write_Filter(0x240, STD_FORMAT);
|
||||
CAN_Start();
|
||||
CAN_Wait_Ready();
|
||||
}
|
||||
/*----------------------------------------------------------------------------
|
||||
setup CAN interface
|
||||
*----------------------------------------------------------------------------*/
|
||||
void CAN_Setup(uint32_t speed) {
|
||||
|
||||
RCC->AHBENR |= RCC_AHBENR_GPIOBEN;
|
||||
RCC->APB1ENR |= RCC_APB1ENR_CANEN;
|
||||
GPIOB->MODER &= ~((3 << (8 * 2)) | (3 << (9 * 2)));
|
||||
GPIOB->MODER |= ((2 << (8 * 2)) | (2 << (9 * 2)));
|
||||
GPIOB->OTYPER &= ~((1 << 8) | (1 << 9));
|
||||
GPIOB->OSPEEDR &= ~((3 << (8 * 2)) | (3 << (9 * 2)));
|
||||
GPIOB->PUPDR &= ~((3 << (8 * 2)) | (3 << (9 * 2)));
|
||||
GPIOB->AFR[1] &= ~((15 << (0 * 4)) | (15 << (1 * 4)));
|
||||
GPIOB->AFR[1] |= ((4 << 0) | (4 << (1 * 4)));
|
||||
CAN->MCR |= CAN_MCR_INRQ;
|
||||
while ((CAN->MSR & CAN_MSR_INAK) != CAN_MSR_INAK) {
|
||||
//some code
|
||||
}
|
||||
CAN->MCR &= ~ CAN_MCR_SLEEP;
|
||||
CAN->BTR &= ~(((0x03) << 24) | ((0x07) << 20) | ((0x0F) << 16) | (0x1FF));
|
||||
CAN->BTR |= speed;
|
||||
NVIC_EnableIRQ(CEC_CAN_IRQn);
|
||||
CAN->IER |= CAN_IER_FMPIE0;
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
leave initialisation mode
|
||||
*----------------------------------------------------------------------------*/
|
||||
void CAN_Start(void) {
|
||||
CAN->MCR &= ~CAN_MCR_INRQ;
|
||||
while ((CAN->MSR & CAN_MSR_INAK) == CAN_MSR_INAK) {
|
||||
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
check if transmit mailbox is empty
|
||||
*----------------------------------------------------------------------------*/
|
||||
void CAN_Wait_Ready(void) {
|
||||
while ((CAN->TSR & CAN_TSR_TME0) == 0) { // Transmit mailbox 0 is empty
|
||||
|
||||
}
|
||||
CAN_TX_Rdy = 1;
|
||||
}
|
||||
|
||||
// CAN send data
|
||||
void CAN_Send_Msg(can_msg_typedef *msg) {
|
||||
CAN_TX_Rdy = 0;
|
||||
CAN->sTxMailBox[0].TIR = (uint32_t) 0;
|
||||
if (msg->format == STD_FORMAT) {
|
||||
CAN->sTxMailBox[0].TIR |= (uint32_t) (msg->id << 21) | CAN_ID_STD;
|
||||
} else {
|
||||
CAN->sTxMailBox[0].TIR |= (uint32_t) (msg->id << 3) | CAN_ID_EXT;
|
||||
}
|
||||
if (msg->frame == DATA_FRAME) {
|
||||
CAN->sTxMailBox[0].TIR |= CAN_RTR_DATA;
|
||||
} else {
|
||||
CAN->sTxMailBox[0].TIR |= CAN_RTR_REMOTE;
|
||||
}
|
||||
CAN->sTxMailBox[0].TDLR = (((uint32_t) msg->data[3] << 24)
|
||||
| ((uint32_t) msg->data[2] << 16) | ((uint32_t) msg->data[1] << 8)
|
||||
| ((uint32_t) msg->data[0]));
|
||||
CAN->sTxMailBox[0].TDHR = (((uint32_t) msg->data[7] << 24)
|
||||
| ((uint32_t) msg->data[6] << 16) | ((uint32_t) msg->data[5] << 8)
|
||||
| ((uint32_t) msg->data[4]));
|
||||
CAN->sTxMailBox[0].TDTR &= ~CAN_TDT0R_DLC;
|
||||
CAN->sTxMailBox[0].TDTR |= (msg->lenght & CAN_TDT0R_DLC);
|
||||
CAN->IER |= CAN_IER_TMEIE;
|
||||
CAN->sTxMailBox[0].TIR |= CAN_TI0R_TXRQ;
|
||||
}
|
||||
// Read CAN message
|
||||
void CAN_Read_Msg(can_msg_typedef *msg) {
|
||||
if ((CAN->sFIFOMailBox[0].RIR & CAN_ID_EXT) == 0) {
|
||||
msg->format = STD_FORMAT;
|
||||
msg->id = (uint32_t) 0x000007FF & (CAN->sFIFOMailBox[0].RIR >> 21);
|
||||
} else {
|
||||
msg->format = EXTD_FORMAT;
|
||||
msg->id = (uint32_t) 0x0003FFFF & (CAN->sFIFOMailBox[0].RIR >> 3);
|
||||
}
|
||||
if ((CAN->sFIFOMailBox[0].RIR & CAN_RTR_REMOTE) == 0) {
|
||||
msg->frame = DATA_FRAME;
|
||||
} else {
|
||||
msg->frame = REMOTE_FRAME;
|
||||
}
|
||||
msg->lenght = (uint8_t) 0x0000000F & CAN->sFIFOMailBox[0].RDTR;
|
||||
msg->data[0] = (uint32_t) 0x000000FF & (CAN->sFIFOMailBox[0].RDLR);
|
||||
msg->data[1] = (uint32_t) 0x000000FF & (CAN->sFIFOMailBox[0].RDLR >> 8);
|
||||
msg->data[2] = (uint32_t) 0x000000FF & (CAN->sFIFOMailBox[0].RDLR >> 16);
|
||||
msg->data[3] = (uint32_t) 0x000000FF & (CAN->sFIFOMailBox[0].RDLR >> 24);
|
||||
msg->data[4] = (uint32_t) 0x000000FF & (CAN->sFIFOMailBox[0].RDHR);
|
||||
msg->data[5] = (uint32_t) 0x000000FF & (CAN->sFIFOMailBox[0].RDHR >> 8);
|
||||
msg->data[6] = (uint32_t) 0x000000FF & (CAN->sFIFOMailBox[0].RDHR >> 16);
|
||||
msg->data[7] = (uint32_t) 0x000000FF & (CAN->sFIFOMailBox[0].RDHR >> 24);
|
||||
CAN->RF0R |= CAN_RF0R_RFOM0;
|
||||
|
||||
CAN_RX_Rdy = 0;
|
||||
// if (msg->id == 0x643)
|
||||
// printf(
|
||||
// "CAN ID: 0x%X%X Data: 0x%X 0x%X 0x%X 0x%X 0x%X 0x%X 0x%X 0x%X \n",
|
||||
// (uint16_t) (msg->id >> 16), (uint16_t) msg->id, msg->data[0],
|
||||
// msg->data[1], msg->data[2], msg->data[3], msg->data[4],
|
||||
// msg->data[5], msg->data[6], msg->data[7]);
|
||||
// //(&canRxMsg); //TO DO not realy working
|
||||
}
|
||||
//Write CAN Filter
|
||||
void CAN_Write_Filter(uint32_t id, uint8_t format) {
|
||||
uint32_t CAN_msg_typedefId = 0;
|
||||
if (CAN_Filter_Idx > 13) {
|
||||
return;
|
||||
}
|
||||
if (format == STD_FORMAT) {
|
||||
CAN_msg_typedefId |= (uint32_t) (id << 21) | CAN_ID_STD;
|
||||
} else {
|
||||
CAN_msg_typedefId |= (uint32_t) (id << 3) | CAN_ID_EXT;
|
||||
}
|
||||
CAN->FMR |= CAN_FMR_FINIT;
|
||||
CAN->FA1R &= ~(uint32_t) (1 << CAN_Filter_Idx);
|
||||
CAN->FS1R |= (uint32_t) (1 << CAN_Filter_Idx);
|
||||
CAN->FM1R |= (uint32_t) (1 << CAN_Filter_Idx);
|
||||
//Comment next to lines for no filter
|
||||
if (id != 0) {
|
||||
CAN->sFilterRegister[CAN_Filter_Idx].FR1 = CAN_msg_typedefId;
|
||||
CAN->sFilterRegister[CAN_Filter_Idx].FR2 = CAN_msg_typedefId;
|
||||
//Uncomment next to line for no filter
|
||||
} else {
|
||||
CAN->sFilterRegister[CAN_Filter_Idx].FR1 = 0; // 32-bit identifier
|
||||
CAN->sFilterRegister[CAN_Filter_Idx].FR2 = 0; // 32-bit identifier
|
||||
}
|
||||
CAN->FFA1R &= ~(uint32_t) (1 << CAN_Filter_Idx);
|
||||
CAN->FA1R |= (uint32_t) (1 << CAN_Filter_Idx);
|
||||
CAN->FMR &= ~CAN_FMR_FINIT;
|
||||
CAN_Filter_Idx++;
|
||||
}
|
||||
//CAN recive/transmit irq handler
|
||||
void CEC_CAN_IRQHandler(void) {
|
||||
if ((CAN->TSR & CAN_TSR_TME0) == CAN_TSR_TME0) {
|
||||
CAN->TSR |= CAN_TSR_RQCP0;
|
||||
CAN->IER &= ~CAN_IER_TMEIE;
|
||||
CAN_TX_Rdy = 1;
|
||||
}
|
||||
if ((CAN->RF0R & CAN_RF0R_FMP0) != 0) {
|
||||
//CAN_Add_RX_Buffer();
|
||||
// TO DO
|
||||
CAN->RF0R |= CAN_RF0R_RFOM0;
|
||||
CAN_RX_Rdy = 1;
|
||||
}
|
||||
}
|
||||
void CAN_Send_TX_Buffer(void) {
|
||||
|
||||
if (CAN_TX_Rdy) {
|
||||
//HAL_GPIO_TogglePin(GPIOB, GPIO_PIN_1);
|
||||
if (CAN_TX_Buffer.todo > 0) {
|
||||
CAN_TX_Buffer.todo--;
|
||||
//HAL_GPIO_TogglePin(GPIOB, GPIO_PIN_1);
|
||||
CAN_Send_Msg(&CAN_TX_Buffer.data[CAN_TX_Buffer.done]);
|
||||
if ((CAN_TX_Buffer.done++) > 14) {
|
||||
CAN_TX_Buffer.done = 0;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
void CAN_Add_TX_Buffer(can_msg_typedef *data) {
|
||||
if ((CAN_TX_Buffer.todo++) < 15) {
|
||||
if ((CAN_TX_Buffer.corent++) > 14) {
|
||||
CAN_TX_Buffer.corent = 0;
|
||||
}
|
||||
//memcpy((void*) &canTX_buffer.data[canTX_buffer.corent], (void*) &data, sizeof(CAN_msg_typedef));
|
||||
CAN_TX_Buffer.data[CAN_TX_Buffer.corent].id = data->id;
|
||||
CAN_TX_Buffer.data[CAN_TX_Buffer.corent].format = data->format;
|
||||
CAN_TX_Buffer.data[CAN_TX_Buffer.corent].frame = data->frame;
|
||||
CAN_TX_Buffer.data[CAN_TX_Buffer.corent].lenght = data->lenght;
|
||||
CAN_TX_Buffer.data[CAN_TX_Buffer.corent].data[0] = data->data[0];
|
||||
CAN_TX_Buffer.data[CAN_TX_Buffer.corent].data[1] = data->data[1];
|
||||
CAN_TX_Buffer.data[CAN_TX_Buffer.corent].data[2] = data->data[2];
|
||||
CAN_TX_Buffer.data[CAN_TX_Buffer.corent].data[3] = data->data[3];
|
||||
CAN_TX_Buffer.data[CAN_TX_Buffer.corent].data[4] = data->data[4];
|
||||
CAN_TX_Buffer.data[CAN_TX_Buffer.corent].data[5] = data->data[5];
|
||||
CAN_TX_Buffer.data[CAN_TX_Buffer.corent].data[6] = data->data[6];
|
||||
CAN_TX_Buffer.data[CAN_TX_Buffer.corent].data[7] = data->data[7];
|
||||
}
|
||||
}
|
||||
void CAN_Add_RX_Buffer(void) {
|
||||
if ((CAN_RX_Buffer.todo) < 16) {
|
||||
CAN_RX_Buffer.todo++;
|
||||
if ((CAN->sFIFOMailBox[0].RIR & CAN_ID_EXT) == 0) {
|
||||
CAN_RX_Buffer.data[CAN_RX_Buffer.corent].format = STD_FORMAT;
|
||||
CAN_RX_Buffer.data[CAN_RX_Buffer.corent].id = (uint32_t) 0x000007FF
|
||||
& (CAN->sFIFOMailBox[0].RIR >> 21);
|
||||
} else {
|
||||
CAN_RX_Buffer.data[CAN_RX_Buffer.corent].format = EXTD_FORMAT;
|
||||
CAN_RX_Buffer.data[CAN_RX_Buffer.corent].id = (uint32_t) 0x0003FFFF
|
||||
& (CAN->sFIFOMailBox[0].RIR >> 3);
|
||||
}
|
||||
if ((CAN->sFIFOMailBox[0].RIR & CAN_RTR_REMOTE) == 0) {
|
||||
CAN_RX_Buffer.data[CAN_RX_Buffer.corent].frame = DATA_FRAME;
|
||||
} else {
|
||||
CAN_RX_Buffer.data[CAN_RX_Buffer.corent].frame = REMOTE_FRAME;
|
||||
}
|
||||
CAN_RX_Buffer.data[CAN_RX_Buffer.corent].lenght = (uint8_t) 0x0000000F
|
||||
& CAN->sFIFOMailBox[0].RDTR;
|
||||
CAN_RX_Buffer.data[CAN_RX_Buffer.corent].data[0] = (uint32_t) 0x000000FF
|
||||
& (CAN->sFIFOMailBox[0].RDLR);
|
||||
CAN_RX_Buffer.data[CAN_RX_Buffer.corent].data[1] = (uint32_t) 0x000000FF
|
||||
& (CAN->sFIFOMailBox[0].RDLR >> 8);
|
||||
CAN_RX_Buffer.data[CAN_RX_Buffer.corent].data[2] = (uint32_t) 0x000000FF
|
||||
& (CAN->sFIFOMailBox[0].RDLR >> 16);
|
||||
CAN_RX_Buffer.data[CAN_RX_Buffer.corent].data[3] = (uint32_t) 0x000000FF
|
||||
& (CAN->sFIFOMailBox[0].RDLR >> 24);
|
||||
CAN_RX_Buffer.data[CAN_RX_Buffer.corent].data[4] = (uint32_t) 0x000000FF
|
||||
& (CAN->sFIFOMailBox[0].RDHR);
|
||||
CAN_RX_Buffer.data[CAN_RX_Buffer.corent].data[5] = (uint32_t) 0x000000FF
|
||||
& (CAN->sFIFOMailBox[0].RDHR >> 8);
|
||||
CAN_RX_Buffer.data[CAN_RX_Buffer.corent].data[6] = (uint32_t) 0x000000FF
|
||||
& (CAN->sFIFOMailBox[0].RDHR >> 16);
|
||||
CAN_RX_Buffer.data[CAN_RX_Buffer.corent].data[7] = (uint32_t) 0x000000FF
|
||||
& (CAN->sFIFOMailBox[0].RDHR >> 24);
|
||||
if ((CAN_RX_Buffer.corent++) > 15) {
|
||||
CAN_RX_Buffer.corent = 0;
|
||||
}
|
||||
|
||||
//canAddRXBuffer(&canRxMsg); //TO DO not realy working
|
||||
}
|
||||
CAN->RF0R |= CAN_RF0R_RFOM0;
|
||||
}
|
||||
void CAN_Read_RX_Buffer(can_msg_typedef *data) {
|
||||
if (CAN_RX_Buffer.todo > 0) {
|
||||
//memcpy((void*) &data, (void*) &canRX_buffer.data[canRX_buffer.done], sizeof(CAN_msg_typedef));
|
||||
data->id = CAN_RX_Buffer.data[CAN_RX_Buffer.done].id;
|
||||
data->format = CAN_RX_Buffer.data[CAN_RX_Buffer.done].format;
|
||||
data->frame = CAN_RX_Buffer.data[CAN_RX_Buffer.done].frame;
|
||||
data->lenght = CAN_RX_Buffer.data[CAN_RX_Buffer.done].lenght;
|
||||
data->data[0] = CAN_RX_Buffer.data[CAN_RX_Buffer.done].data[0];
|
||||
data->data[1] = CAN_RX_Buffer.data[CAN_RX_Buffer.done].data[1];
|
||||
data->data[2] = CAN_RX_Buffer.data[CAN_RX_Buffer.done].data[2];
|
||||
data->data[3] = CAN_RX_Buffer.data[CAN_RX_Buffer.done].data[3];
|
||||
data->data[4] = CAN_RX_Buffer.data[CAN_RX_Buffer.done].data[4];
|
||||
data->data[5] = CAN_RX_Buffer.data[CAN_RX_Buffer.done].data[5];
|
||||
data->data[6] = CAN_RX_Buffer.data[CAN_RX_Buffer.done].data[6];
|
||||
data->data[7] = CAN_RX_Buffer.data[CAN_RX_Buffer.done].data[7];
|
||||
if ((CAN_RX_Buffer.done++) > 15) {
|
||||
CAN_RX_Buffer.done = 0;
|
||||
}
|
||||
CAN_RX_Buffer.todo--;
|
||||
}
|
||||
}
|
||||
224
Test2/Core/Src/haltech.c
Normal file
224
Test2/Core/Src/haltech.c
Normal file
@@ -0,0 +1,224 @@
|
||||
/*
|
||||
* mazda_can.c
|
||||
*
|
||||
* Created on: Mar 17, 2022
|
||||
* Author: v0stap
|
||||
*/
|
||||
|
||||
/*
|
||||
* app.c
|
||||
*
|
||||
* Created on: Jul 25, 2020
|
||||
* Author: v0stap
|
||||
*/
|
||||
|
||||
//int AVIsendCANAddress = 0x2C0;
|
||||
//int DPIsendCANAddress1 = 0x2C2;
|
||||
//int DPIsendCANAddress2 = 0x2C4;
|
||||
//int DPOrxCANAddress1 = 0x2D0;
|
||||
//int DPOrxCANAddress2 = 0x2D2;
|
||||
//int KeepAliveCANAddress = 0x2C6;
|
||||
#include "main.h"
|
||||
void Haltech_App_Init(void) {
|
||||
// configure TIM2 to 1uS / tick timer
|
||||
// setup CCR interrupt happen after sturtup delay is over
|
||||
|
||||
}
|
||||
|
||||
void Haltech_App(uint32_t id) {
|
||||
if (CAN_RX_Rdy) {
|
||||
var.can_timeout = 0;
|
||||
CAN_Read_Msg(&CAN_RX_Msg);
|
||||
Haltech_Write_Digital(&CAN_RX_Msg);
|
||||
}
|
||||
if (var.can_timeout > 2) {
|
||||
|
||||
}
|
||||
if (CAN_TX_Rdy) {
|
||||
if (var.Send_Data_IRQ) {
|
||||
|
||||
if (var.Send_Data_IRQ == 4)
|
||||
Haltech_Send_Keap_Alive(id + 6);
|
||||
else if (var.Send_Data_IRQ == 3)
|
||||
Haltech_Send_Analog(id);
|
||||
else if (var.Send_Data_IRQ == 2)
|
||||
Haltech_Send_Digital1(id + 2);
|
||||
else if (var.Send_Data_IRQ == 1)
|
||||
Haltech_Send_Digital2(id + 4);
|
||||
var.Send_Data_IRQ--;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void Haltech_Send_Analog(uint32_t id) {
|
||||
|
||||
Get_Analog_Var();
|
||||
|
||||
CAN_TX_Msg.id = id;
|
||||
CAN_TX_Msg.frame = DATA_FRAME;
|
||||
CAN_TX_Msg.format = EXTD_FORMAT;
|
||||
CAN_TX_Msg.data[0] = (uint8_t) var.avi[0];
|
||||
CAN_TX_Msg.data[1] = (uint8_t) (var.avi[0] >> 8);
|
||||
CAN_TX_Msg.data[2] = (uint8_t) var.avi[1];
|
||||
CAN_TX_Msg.data[3] = (uint8_t) (var.avi[1] >> 8);
|
||||
CAN_TX_Msg.data[4] = (uint8_t) var.avi[2];
|
||||
CAN_TX_Msg.data[5] = (uint8_t) (var.avi[2] >> 8);
|
||||
CAN_TX_Msg.data[6] = (uint8_t) var.avi[3];
|
||||
CAN_TX_Msg.data[7] = (uint8_t) (var.avi[3] >> 8);
|
||||
CAN_TX_Msg.lenght = 8;
|
||||
CAN_Send_Msg(&CAN_TX_Msg);
|
||||
}
|
||||
|
||||
void Haltech_Send_Digital1(uint32_t id) {
|
||||
if (var.tim1_timeout > 2) {
|
||||
NVIC_DisableIRQ(TIM1_CC_IRQn);
|
||||
if (GPIO_READ_PIN(GPIOB, GPIO_PIN_15)) {
|
||||
var.dvi_dt[0] = 0xff00;
|
||||
var.dvi_fr[0] = 0;
|
||||
} else {
|
||||
var.dvi_dt[0] = 0;
|
||||
var.dvi_fr[0] = 0;
|
||||
}
|
||||
NVIC_EnableIRQ(TIM1_CC_IRQn);
|
||||
}
|
||||
if (var.tim2_timeout > 2) {
|
||||
NVIC_DisableIRQ(TIM2_IRQn);
|
||||
if (GPIO_READ_PIN(GPIOB, GPIO_PIN_3)) {
|
||||
var.dvi_dt[1] = 0xff00;
|
||||
var.dvi_fr[1] = 0;
|
||||
} else {
|
||||
var.dvi_dt[1] = 0;
|
||||
var.dvi_fr[1] = 0;
|
||||
}
|
||||
NVIC_EnableIRQ(TIM2_IRQn);
|
||||
}
|
||||
CAN_TX_Msg.id = id;
|
||||
CAN_TX_Msg.frame = DATA_FRAME;
|
||||
CAN_TX_Msg.format = EXTD_FORMAT;
|
||||
CAN_TX_Msg.data[0] = (uint8_t) (var.dvi_dt[0]);
|
||||
CAN_TX_Msg.data[1] = (uint8_t) (var.dvi_dt[0] >> 8);
|
||||
CAN_TX_Msg.data[2] = (uint8_t) (var.dvi_fr[0]);
|
||||
CAN_TX_Msg.data[3] = (uint8_t) (var.dvi_fr[0] >> 8);
|
||||
CAN_TX_Msg.data[4] = (uint8_t) (var.dvi_dt[1]);
|
||||
CAN_TX_Msg.data[5] = (uint8_t) (var.dvi_dt[1] >> 8);
|
||||
CAN_TX_Msg.data[6] = (uint8_t) (var.dvi_fr[1]);
|
||||
CAN_TX_Msg.data[7] = (uint8_t) (var.dvi_fr[1] >> 8);
|
||||
CAN_TX_Msg.lenght = 8;
|
||||
CAN_Send_Msg(&CAN_TX_Msg);
|
||||
}
|
||||
void Haltech_Send_Digital2(uint32_t id) {
|
||||
if (var.tim3_timeout > 2) {
|
||||
var.dvi_dt[2] = 0xff00;
|
||||
var.dvi_fr[2] = 0;
|
||||
}
|
||||
if (var.tim15_timeout > 2) {
|
||||
NVIC_DisableIRQ(TIM15_IRQn);
|
||||
if (GPIO_READ_PIN(GPIOB, GPIO_PIN_13)) {
|
||||
var.dvi_dt[3] = 0xff00;
|
||||
var.dvi_fr[3] = 0;
|
||||
} else {
|
||||
var.dvi_dt[3] = 0;
|
||||
var.dvi_fr[3] = 0;
|
||||
}
|
||||
NVIC_EnableIRQ(TIM15_IRQn);
|
||||
}
|
||||
CAN_TX_Msg.id = id;
|
||||
CAN_TX_Msg.frame = DATA_FRAME;
|
||||
CAN_TX_Msg.format = EXTD_FORMAT;
|
||||
CAN_TX_Msg.data[0] = (uint8_t) (var.dvi_dt[2]);
|
||||
CAN_TX_Msg.data[1] = (uint8_t) (var.dvi_dt[2] >> 8);
|
||||
CAN_TX_Msg.data[2] = (uint8_t) (var.dvi_fr[2]);
|
||||
CAN_TX_Msg.data[3] = (uint8_t) (var.dvi_fr[2] >> 8);
|
||||
CAN_TX_Msg.data[4] = (uint8_t) (var.dvi_dt[3]);
|
||||
CAN_TX_Msg.data[5] = (uint8_t) (var.dvi_dt[3] >> 8);
|
||||
CAN_TX_Msg.data[6] = (uint8_t) (var.dvi_fr[3]);
|
||||
CAN_TX_Msg.data[7] = (uint8_t) (var.dvi_fr[3] >> 8);
|
||||
CAN_TX_Msg.lenght = 8;
|
||||
CAN_Send_Msg(&CAN_TX_Msg);
|
||||
}
|
||||
|
||||
void Haltech_Send_Keap_Alive(uint32_t id) {
|
||||
CAN_TX_Msg.id = id;
|
||||
CAN_TX_Msg.frame = DATA_FRAME;
|
||||
CAN_TX_Msg.format = EXTD_FORMAT;
|
||||
CAN_TX_Msg.data[0] = 0X10;
|
||||
CAN_TX_Msg.data[1] = 0x09;
|
||||
CAN_TX_Msg.data[2] = 0x0a;
|
||||
CAN_TX_Msg.data[3] = 0x00;
|
||||
CAN_TX_Msg.data[4] = 0x00;
|
||||
CAN_TX_Msg.lenght = 5;
|
||||
|
||||
CAN_Send_Msg(&CAN_TX_Msg);
|
||||
}
|
||||
|
||||
void Haltech_Write_Digital(can_msg_typedef *section) {
|
||||
uint16_t temp_dt = 0, temp_fr = 0;
|
||||
if (section->id == 0x2D0) {
|
||||
//printf("\n Digital1");
|
||||
temp_fr = section->data[0] + (section->data[1] << 8);
|
||||
temp_dt = section->data[2] + (section->data[3] << 8);
|
||||
if (temp_fr != var.dvo_fr[0]) {
|
||||
var.dvo_fr[0] = temp_fr;
|
||||
TIM14->PSC = var.dvo_fr[0];
|
||||
}
|
||||
if (temp_dt != var.dvo_dt[0]) {
|
||||
if (temp_dt < 1000) {
|
||||
var.dvo_dt[0] = temp_dt;
|
||||
TIM14->CCR1 = var.dvo_dt[0];
|
||||
} else {
|
||||
var.dvo_dt[0] = 1000;
|
||||
TIM14->CCR1 = var.dvo_dt[0];
|
||||
}
|
||||
}
|
||||
temp_fr = section->data[4] + (section->data[5] << 8);
|
||||
temp_dt = section->data[6] + (section->data[7] << 8);
|
||||
if (temp_fr != var.dvo_fr[1]) {
|
||||
var.dvo_fr[1] = temp_fr;
|
||||
TIM16->PSC = var.dvo_fr[1];
|
||||
}
|
||||
if (temp_dt != var.dvo_dt[1]) {
|
||||
if (temp_dt < 1000) {
|
||||
var.dvo_dt[1] = temp_dt;
|
||||
TIM16->CCR1 = var.dvo_dt[1];
|
||||
} else {
|
||||
var.dvo_dt[1] = 1000;
|
||||
TIM16->CCR1 = var.dvo_dt[1];
|
||||
}
|
||||
}
|
||||
} else if (section->id == 0x2D2) {
|
||||
temp_fr = section->data[0] + (section->data[1] << 8);
|
||||
temp_dt = section->data[2] + (section->data[3] << 8);
|
||||
if (temp_fr != var.dvo_fr[2]) {
|
||||
var.dvo_fr[2] = temp_fr;
|
||||
TIM17->PSC = var.dvo_fr[2];
|
||||
}
|
||||
if (temp_dt != var.dvo_dt[2]) {
|
||||
if (temp_dt < 1000) {
|
||||
var.dvo_dt[2] = temp_dt;
|
||||
TIM17->CCR1 = var.dvo_dt[2];
|
||||
} else {
|
||||
var.dvo_dt[2] = 1000;
|
||||
TIM17->CCR1 = var.dvo_dt[2];
|
||||
}
|
||||
}
|
||||
temp_fr = section->data[4] + (section->data[5] << 8);
|
||||
temp_dt = section->data[6] + (section->data[7] << 8);
|
||||
if (temp_fr != var.dvo_fr[3]) {
|
||||
var.dvo_fr[3] = temp_fr;
|
||||
TIM7->PSC = var.dvo_fr[3];
|
||||
}
|
||||
if (temp_dt != var.dvo_dt[3]) {
|
||||
if (temp_dt < 1000) {
|
||||
var.dvo_dt[3] = temp_dt;
|
||||
|
||||
//todo
|
||||
} else {
|
||||
var.dvo_dt[3] = 1000;
|
||||
HAL_GPIO_WritePin(GPIOA, GPIO_PIN_5, GPIO_PIN_SET);
|
||||
}
|
||||
}
|
||||
} else {
|
||||
//TODO Eror
|
||||
printf("\n Digital Error");
|
||||
}
|
||||
}
|
||||
827
Test2/Core/Src/main.c
Normal file
827
Test2/Core/Src/main.c
Normal file
@@ -0,0 +1,827 @@
|
||||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file : main.c
|
||||
* @brief : Main program body
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2025 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "main.h"
|
||||
#include "usb_device.h"
|
||||
|
||||
/* Private includes ----------------------------------------------------------*/
|
||||
/* USER CODE BEGIN Includes */
|
||||
|
||||
/* USER CODE END Includes */
|
||||
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* USER CODE BEGIN PTD */
|
||||
|
||||
/* USER CODE END PTD */
|
||||
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN PD */
|
||||
|
||||
/* USER CODE END PD */
|
||||
|
||||
/* Private macro -------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN PM */
|
||||
#define PUTCHAR_PROTOTYPE int __io_putchar(int ch)
|
||||
/* USER CODE END PM */
|
||||
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
ADC_HandleTypeDef hadc;
|
||||
|
||||
TIM_HandleTypeDef htim1;
|
||||
TIM_HandleTypeDef htim2;
|
||||
TIM_HandleTypeDef htim3;
|
||||
TIM_HandleTypeDef htim14;
|
||||
TIM_HandleTypeDef htim15;
|
||||
TIM_HandleTypeDef htim16;
|
||||
TIM_HandleTypeDef htim17;
|
||||
|
||||
UART_HandleTypeDef huart1;
|
||||
|
||||
/* USER CODE BEGIN PV */
|
||||
var_typedef var;
|
||||
/* USER CODE END PV */
|
||||
|
||||
/* Private function prototypes -----------------------------------------------*/
|
||||
void SystemClock_Config(void);
|
||||
static void MX_GPIO_Init(void);
|
||||
static void MX_ADC_Init(void);
|
||||
static void MX_TIM1_Init(void);
|
||||
static void MX_TIM2_Init(void);
|
||||
static void MX_TIM3_Init(void);
|
||||
static void MX_TIM14_Init(void);
|
||||
static void MX_TIM15_Init(void);
|
||||
static void MX_TIM16_Init(void);
|
||||
static void MX_TIM17_Init(void);
|
||||
static void MX_USART1_UART_Init(void);
|
||||
/* USER CODE BEGIN PFP */
|
||||
|
||||
/* USER CODE END PFP */
|
||||
|
||||
/* Private user code ---------------------------------------------------------*/
|
||||
/* USER CODE BEGIN 0 */
|
||||
|
||||
/* USER CODE END 0 */
|
||||
|
||||
/**
|
||||
* @brief The application entry point.
|
||||
* @retval int
|
||||
*/
|
||||
int main(void)
|
||||
{
|
||||
|
||||
/* USER CODE BEGIN 1 */
|
||||
|
||||
/* USER CODE END 1 */
|
||||
|
||||
/* MCU Configuration--------------------------------------------------------*/
|
||||
|
||||
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
|
||||
HAL_Init();
|
||||
|
||||
/* USER CODE BEGIN Init */
|
||||
|
||||
/* USER CODE END Init */
|
||||
|
||||
/* Configure the system clock */
|
||||
SystemClock_Config();
|
||||
|
||||
/* USER CODE BEGIN SysInit */
|
||||
|
||||
/* USER CODE END SysInit */
|
||||
|
||||
/* Initialize all configured peripherals */
|
||||
MX_GPIO_Init();
|
||||
MX_ADC_Init();
|
||||
MX_TIM1_Init();
|
||||
MX_TIM2_Init();
|
||||
MX_TIM3_Init();
|
||||
MX_TIM14_Init();
|
||||
MX_TIM15_Init();
|
||||
MX_TIM16_Init();
|
||||
MX_TIM17_Init();
|
||||
MX_USART1_UART_Init();
|
||||
MX_USB_DEVICE_Init();
|
||||
/* USER CODE BEGIN 2 */
|
||||
Adc_Init();
|
||||
Timers_Init();
|
||||
CAN_Init();
|
||||
var.avi[0] = 0;
|
||||
var.avi[1] = 0;
|
||||
var.avi[2] = 0;
|
||||
var.avi[3] = 0;
|
||||
var.buffer = 49;
|
||||
var.dvo_dt[3] = 700;
|
||||
printf("Hello from STM32 via SWV!\n");
|
||||
/* USER CODE END 2 */
|
||||
|
||||
/* Infinite loop */
|
||||
/* USER CODE BEGIN WHILE */
|
||||
while (1) {
|
||||
/* USER CODE END WHILE */
|
||||
|
||||
/* USER CODE BEGIN 3 */
|
||||
if (TIM7->CNT >= var.dvo_dt[3]) {
|
||||
HAL_GPIO_WritePin(GPIOA, GPIO_PIN_5, GPIO_PIN_RESET);
|
||||
}
|
||||
// HAL_UART_Receive(&huart1, &var.buffer, 1, 10);
|
||||
// if (var.Send_Data_IRQ == 4) {
|
||||
//
|
||||
// if (var.buffer == 49) {
|
||||
// printf("\n Digital F, %d, %d, %d,%d", var.dvi_fr[0],
|
||||
// var.dvi_fr[1], var.dvi_fr[2], var.dvi_fr[3]);
|
||||
// } else if (var.buffer == 50) {
|
||||
// printf("\n Digital D, %d, %d, %d,%d", var.dvi_dt[0],
|
||||
// var.dvi_dt[1], var.dvi_dt[2], var.dvi_dt[3]);
|
||||
// } else if (var.buffer == 51) {
|
||||
// Get_Analog_Var();
|
||||
// printf("\n Analog, %d, %d, %d,%d", var.avi[0], var.avi[1],
|
||||
// var.avi[2], var.avi[3]);
|
||||
// } else {
|
||||
// printf("\nBuffer %d", var.buffer);
|
||||
// }
|
||||
// }
|
||||
Haltech_App(0x2C0);
|
||||
|
||||
}
|
||||
/* USER CODE END 3 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief System Clock Configuration
|
||||
* @retval None
|
||||
*/
|
||||
void SystemClock_Config(void)
|
||||
{
|
||||
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
|
||||
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
|
||||
RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
|
||||
|
||||
/** Initializes the RCC Oscillators according to the specified parameters
|
||||
* in the RCC_OscInitTypeDef structure.
|
||||
*/
|
||||
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI14|RCC_OSCILLATORTYPE_HSE;
|
||||
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
|
||||
RCC_OscInitStruct.HSI14State = RCC_HSI14_ON;
|
||||
RCC_OscInitStruct.HSI14CalibrationValue = 16;
|
||||
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
||||
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
|
||||
RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL6;
|
||||
RCC_OscInitStruct.PLL.PREDIV = RCC_PREDIV_DIV1;
|
||||
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
|
||||
/** Initializes the CPU, AHB and APB buses clocks
|
||||
*/
|
||||
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|
||||
|RCC_CLOCKTYPE_PCLK1;
|
||||
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
|
||||
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
|
||||
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
|
||||
|
||||
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB|RCC_PERIPHCLK_USART1;
|
||||
PeriphClkInit.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK1;
|
||||
PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL;
|
||||
|
||||
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief ADC Initialization Function
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
static void MX_ADC_Init(void)
|
||||
{
|
||||
|
||||
/* USER CODE BEGIN ADC_Init 0 */
|
||||
|
||||
/* USER CODE END ADC_Init 0 */
|
||||
|
||||
ADC_ChannelConfTypeDef sConfig = {0};
|
||||
|
||||
/* USER CODE BEGIN ADC_Init 1 */
|
||||
|
||||
/* USER CODE END ADC_Init 1 */
|
||||
|
||||
/** Configure the global features of the ADC (Clock, Resolution, Data Alignment and number of conversion)
|
||||
*/
|
||||
hadc.Instance = ADC1;
|
||||
hadc.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV1;
|
||||
hadc.Init.Resolution = ADC_RESOLUTION_12B;
|
||||
hadc.Init.DataAlign = ADC_DATAALIGN_RIGHT;
|
||||
hadc.Init.ScanConvMode = ADC_SCAN_DIRECTION_FORWARD;
|
||||
hadc.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
|
||||
hadc.Init.LowPowerAutoWait = DISABLE;
|
||||
hadc.Init.LowPowerAutoPowerOff = DISABLE;
|
||||
hadc.Init.ContinuousConvMode = DISABLE;
|
||||
hadc.Init.DiscontinuousConvMode = DISABLE;
|
||||
hadc.Init.ExternalTrigConv = ADC_SOFTWARE_START;
|
||||
hadc.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
|
||||
hadc.Init.DMAContinuousRequests = DISABLE;
|
||||
hadc.Init.Overrun = ADC_OVR_DATA_PRESERVED;
|
||||
if (HAL_ADC_Init(&hadc) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
|
||||
/** Configure for the selected ADC regular channel to be converted.
|
||||
*/
|
||||
sConfig.Channel = ADC_CHANNEL_0;
|
||||
sConfig.Rank = ADC_RANK_CHANNEL_NUMBER;
|
||||
sConfig.SamplingTime = ADC_SAMPLETIME_1CYCLE_5;
|
||||
if (HAL_ADC_ConfigChannel(&hadc, &sConfig) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
|
||||
/** Configure for the selected ADC regular channel to be converted.
|
||||
*/
|
||||
sConfig.Channel = ADC_CHANNEL_1;
|
||||
if (HAL_ADC_ConfigChannel(&hadc, &sConfig) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
|
||||
/** Configure for the selected ADC regular channel to be converted.
|
||||
*/
|
||||
sConfig.Channel = ADC_CHANNEL_2;
|
||||
if (HAL_ADC_ConfigChannel(&hadc, &sConfig) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
|
||||
/** Configure for the selected ADC regular channel to be converted.
|
||||
*/
|
||||
sConfig.Channel = ADC_CHANNEL_3;
|
||||
if (HAL_ADC_ConfigChannel(&hadc, &sConfig) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
/* USER CODE BEGIN ADC_Init 2 */
|
||||
|
||||
/* USER CODE END ADC_Init 2 */
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief TIM1 Initialization Function
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
static void MX_TIM1_Init(void)
|
||||
{
|
||||
|
||||
/* USER CODE BEGIN TIM1_Init 0 */
|
||||
|
||||
/* USER CODE END TIM1_Init 0 */
|
||||
|
||||
TIM_SlaveConfigTypeDef sSlaveConfig = {0};
|
||||
TIM_IC_InitTypeDef sConfigIC = {0};
|
||||
TIM_MasterConfigTypeDef sMasterConfig = {0};
|
||||
|
||||
/* USER CODE BEGIN TIM1_Init 1 */
|
||||
|
||||
/* USER CODE END TIM1_Init 1 */
|
||||
htim1.Instance = TIM1;
|
||||
htim1.Init.Prescaler = 0;
|
||||
htim1.Init.CounterMode = TIM_COUNTERMODE_UP;
|
||||
htim1.Init.Period = 65535;
|
||||
htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
|
||||
htim1.Init.RepetitionCounter = 0;
|
||||
htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
|
||||
if (HAL_TIM_IC_Init(&htim1) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
sSlaveConfig.SlaveMode = TIM_SLAVEMODE_RESET;
|
||||
sSlaveConfig.InputTrigger = TIM_TS_TI1FP1;
|
||||
sSlaveConfig.TriggerPolarity = TIM_INPUTCHANNELPOLARITY_RISING;
|
||||
sSlaveConfig.TriggerPrescaler = TIM_ICPSC_DIV1;
|
||||
sSlaveConfig.TriggerFilter = 0;
|
||||
if (HAL_TIM_SlaveConfigSynchro(&htim1, &sSlaveConfig) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
sConfigIC.ICPolarity = TIM_INPUTCHANNELPOLARITY_RISING;
|
||||
sConfigIC.ICSelection = TIM_ICSELECTION_DIRECTTI;
|
||||
sConfigIC.ICPrescaler = TIM_ICPSC_DIV1;
|
||||
sConfigIC.ICFilter = 0;
|
||||
if (HAL_TIM_IC_ConfigChannel(&htim1, &sConfigIC, TIM_CHANNEL_1) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
sConfigIC.ICPolarity = TIM_INPUTCHANNELPOLARITY_FALLING;
|
||||
sConfigIC.ICSelection = TIM_ICSELECTION_INDIRECTTI;
|
||||
if (HAL_TIM_IC_ConfigChannel(&htim1, &sConfigIC, TIM_CHANNEL_2) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
|
||||
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
|
||||
if (HAL_TIMEx_MasterConfigSynchronization(&htim1, &sMasterConfig) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
/* USER CODE BEGIN TIM1_Init 2 */
|
||||
|
||||
/* USER CODE END TIM1_Init 2 */
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief TIM2 Initialization Function
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
static void MX_TIM2_Init(void)
|
||||
{
|
||||
|
||||
/* USER CODE BEGIN TIM2_Init 0 */
|
||||
|
||||
/* USER CODE END TIM2_Init 0 */
|
||||
|
||||
TIM_SlaveConfigTypeDef sSlaveConfig = {0};
|
||||
TIM_IC_InitTypeDef sConfigIC = {0};
|
||||
TIM_MasterConfigTypeDef sMasterConfig = {0};
|
||||
|
||||
/* USER CODE BEGIN TIM2_Init 1 */
|
||||
|
||||
/* USER CODE END TIM2_Init 1 */
|
||||
htim2.Instance = TIM2;
|
||||
htim2.Init.Prescaler = 0;
|
||||
htim2.Init.CounterMode = TIM_COUNTERMODE_UP;
|
||||
htim2.Init.Period = 4294967295;
|
||||
htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
|
||||
htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
|
||||
if (HAL_TIM_IC_Init(&htim2) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
sSlaveConfig.SlaveMode = TIM_SLAVEMODE_RESET;
|
||||
sSlaveConfig.InputTrigger = TIM_TS_TI1FP1;
|
||||
sSlaveConfig.TriggerPolarity = TIM_INPUTCHANNELPOLARITY_RISING;
|
||||
sSlaveConfig.TriggerPrescaler = TIM_ICPSC_DIV1;
|
||||
sSlaveConfig.TriggerFilter = 0;
|
||||
if (HAL_TIM_SlaveConfigSynchro(&htim2, &sSlaveConfig) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
sConfigIC.ICPolarity = TIM_INPUTCHANNELPOLARITY_RISING;
|
||||
sConfigIC.ICSelection = TIM_ICSELECTION_DIRECTTI;
|
||||
sConfigIC.ICPrescaler = TIM_ICPSC_DIV1;
|
||||
sConfigIC.ICFilter = 0;
|
||||
if (HAL_TIM_IC_ConfigChannel(&htim2, &sConfigIC, TIM_CHANNEL_1) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
sConfigIC.ICPolarity = TIM_INPUTCHANNELPOLARITY_FALLING;
|
||||
sConfigIC.ICSelection = TIM_ICSELECTION_INDIRECTTI;
|
||||
if (HAL_TIM_IC_ConfigChannel(&htim2, &sConfigIC, TIM_CHANNEL_2) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
|
||||
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
|
||||
if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
/* USER CODE BEGIN TIM2_Init 2 */
|
||||
|
||||
/* USER CODE END TIM2_Init 2 */
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief TIM3 Initialization Function
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
static void MX_TIM3_Init(void)
|
||||
{
|
||||
|
||||
/* USER CODE BEGIN TIM3_Init 0 */
|
||||
|
||||
/* USER CODE END TIM3_Init 0 */
|
||||
|
||||
TIM_SlaveConfigTypeDef sSlaveConfig = {0};
|
||||
TIM_IC_InitTypeDef sConfigIC = {0};
|
||||
TIM_MasterConfigTypeDef sMasterConfig = {0};
|
||||
|
||||
/* USER CODE BEGIN TIM3_Init 1 */
|
||||
|
||||
/* USER CODE END TIM3_Init 1 */
|
||||
htim3.Instance = TIM3;
|
||||
htim3.Init.Prescaler = 0;
|
||||
htim3.Init.CounterMode = TIM_COUNTERMODE_UP;
|
||||
htim3.Init.Period = 65535;
|
||||
htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
|
||||
htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
|
||||
if (HAL_TIM_IC_Init(&htim3) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
sSlaveConfig.SlaveMode = TIM_SLAVEMODE_RESET;
|
||||
sSlaveConfig.InputTrigger = TIM_TS_TI2FP2;
|
||||
sSlaveConfig.TriggerPolarity = TIM_INPUTCHANNELPOLARITY_FALLING;
|
||||
sSlaveConfig.TriggerPrescaler = TIM_ICPSC_DIV1;
|
||||
sSlaveConfig.TriggerFilter = 0;
|
||||
if (HAL_TIM_SlaveConfigSynchro(&htim3, &sSlaveConfig) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
sConfigIC.ICPolarity = TIM_INPUTCHANNELPOLARITY_RISING;
|
||||
sConfigIC.ICSelection = TIM_ICSELECTION_INDIRECTTI;
|
||||
sConfigIC.ICPrescaler = TIM_ICPSC_DIV1;
|
||||
sConfigIC.ICFilter = 0;
|
||||
if (HAL_TIM_IC_ConfigChannel(&htim3, &sConfigIC, TIM_CHANNEL_1) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
sConfigIC.ICPolarity = TIM_INPUTCHANNELPOLARITY_FALLING;
|
||||
sConfigIC.ICSelection = TIM_ICSELECTION_DIRECTTI;
|
||||
if (HAL_TIM_IC_ConfigChannel(&htim3, &sConfigIC, TIM_CHANNEL_2) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
|
||||
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
|
||||
if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
/* USER CODE BEGIN TIM3_Init 2 */
|
||||
|
||||
/* USER CODE END TIM3_Init 2 */
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief TIM14 Initialization Function
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
static void MX_TIM14_Init(void)
|
||||
{
|
||||
|
||||
/* USER CODE BEGIN TIM14_Init 0 */
|
||||
|
||||
/* USER CODE END TIM14_Init 0 */
|
||||
|
||||
TIM_OC_InitTypeDef sConfigOC = {0};
|
||||
|
||||
/* USER CODE BEGIN TIM14_Init 1 */
|
||||
|
||||
/* USER CODE END TIM14_Init 1 */
|
||||
htim14.Instance = TIM14;
|
||||
htim14.Init.Prescaler = 48-1;
|
||||
htim14.Init.CounterMode = TIM_COUNTERMODE_UP;
|
||||
htim14.Init.Period = 65535;
|
||||
htim14.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
|
||||
htim14.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
|
||||
if (HAL_TIM_Base_Init(&htim14) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
if (HAL_TIM_PWM_Init(&htim14) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
sConfigOC.OCMode = TIM_OCMODE_PWM1;
|
||||
sConfigOC.Pulse = 1;
|
||||
sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
|
||||
sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
|
||||
if (HAL_TIM_PWM_ConfigChannel(&htim14, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
/* USER CODE BEGIN TIM14_Init 2 */
|
||||
|
||||
/* USER CODE END TIM14_Init 2 */
|
||||
HAL_TIM_MspPostInit(&htim14);
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief TIM15 Initialization Function
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
static void MX_TIM15_Init(void)
|
||||
{
|
||||
|
||||
/* USER CODE BEGIN TIM15_Init 0 */
|
||||
|
||||
/* USER CODE END TIM15_Init 0 */
|
||||
|
||||
TIM_SlaveConfigTypeDef sSlaveConfig = {0};
|
||||
TIM_IC_InitTypeDef sConfigIC = {0};
|
||||
TIM_MasterConfigTypeDef sMasterConfig = {0};
|
||||
|
||||
/* USER CODE BEGIN TIM15_Init 1 */
|
||||
|
||||
/* USER CODE END TIM15_Init 1 */
|
||||
htim15.Instance = TIM15;
|
||||
htim15.Init.Prescaler = 0;
|
||||
htim15.Init.CounterMode = TIM_COUNTERMODE_UP;
|
||||
htim15.Init.Period = 65535;
|
||||
htim15.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
|
||||
htim15.Init.RepetitionCounter = 0;
|
||||
htim15.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
|
||||
if (HAL_TIM_IC_Init(&htim15) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
sSlaveConfig.SlaveMode = TIM_SLAVEMODE_RESET;
|
||||
sSlaveConfig.InputTrigger = TIM_TS_TI1FP1;
|
||||
sSlaveConfig.TriggerPolarity = TIM_INPUTCHANNELPOLARITY_RISING;
|
||||
sSlaveConfig.TriggerPrescaler = TIM_ICPSC_DIV1;
|
||||
sSlaveConfig.TriggerFilter = 0;
|
||||
if (HAL_TIM_SlaveConfigSynchro(&htim15, &sSlaveConfig) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
sConfigIC.ICPolarity = TIM_INPUTCHANNELPOLARITY_RISING;
|
||||
sConfigIC.ICSelection = TIM_ICSELECTION_DIRECTTI;
|
||||
sConfigIC.ICPrescaler = TIM_ICPSC_DIV1;
|
||||
sConfigIC.ICFilter = 0;
|
||||
if (HAL_TIM_IC_ConfigChannel(&htim15, &sConfigIC, TIM_CHANNEL_1) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
sConfigIC.ICPolarity = TIM_INPUTCHANNELPOLARITY_FALLING;
|
||||
sConfigIC.ICSelection = TIM_ICSELECTION_INDIRECTTI;
|
||||
if (HAL_TIM_IC_ConfigChannel(&htim15, &sConfigIC, TIM_CHANNEL_2) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
|
||||
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
|
||||
if (HAL_TIMEx_MasterConfigSynchronization(&htim15, &sMasterConfig) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
/* USER CODE BEGIN TIM15_Init 2 */
|
||||
|
||||
/* USER CODE END TIM15_Init 2 */
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief TIM16 Initialization Function
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
static void MX_TIM16_Init(void)
|
||||
{
|
||||
|
||||
/* USER CODE BEGIN TIM16_Init 0 */
|
||||
|
||||
/* USER CODE END TIM16_Init 0 */
|
||||
|
||||
TIM_OC_InitTypeDef sConfigOC = {0};
|
||||
TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig = {0};
|
||||
|
||||
/* USER CODE BEGIN TIM16_Init 1 */
|
||||
|
||||
/* USER CODE END TIM16_Init 1 */
|
||||
htim16.Instance = TIM16;
|
||||
htim16.Init.Prescaler = 0;
|
||||
htim16.Init.CounterMode = TIM_COUNTERMODE_UP;
|
||||
htim16.Init.Period = 65535;
|
||||
htim16.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
|
||||
htim16.Init.RepetitionCounter = 0;
|
||||
htim16.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
|
||||
if (HAL_TIM_Base_Init(&htim16) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
if (HAL_TIM_PWM_Init(&htim16) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
sConfigOC.OCMode = TIM_OCMODE_PWM1;
|
||||
sConfigOC.Pulse = 0;
|
||||
sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
|
||||
sConfigOC.OCNPolarity = TIM_OCNPOLARITY_HIGH;
|
||||
sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
|
||||
sConfigOC.OCIdleState = TIM_OCIDLESTATE_RESET;
|
||||
sConfigOC.OCNIdleState = TIM_OCNIDLESTATE_RESET;
|
||||
if (HAL_TIM_PWM_ConfigChannel(&htim16, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
sBreakDeadTimeConfig.OffStateRunMode = TIM_OSSR_DISABLE;
|
||||
sBreakDeadTimeConfig.OffStateIDLEMode = TIM_OSSI_DISABLE;
|
||||
sBreakDeadTimeConfig.LockLevel = TIM_LOCKLEVEL_OFF;
|
||||
sBreakDeadTimeConfig.DeadTime = 0;
|
||||
sBreakDeadTimeConfig.BreakState = TIM_BREAK_DISABLE;
|
||||
sBreakDeadTimeConfig.BreakPolarity = TIM_BREAKPOLARITY_HIGH;
|
||||
sBreakDeadTimeConfig.AutomaticOutput = TIM_AUTOMATICOUTPUT_DISABLE;
|
||||
if (HAL_TIMEx_ConfigBreakDeadTime(&htim16, &sBreakDeadTimeConfig) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
/* USER CODE BEGIN TIM16_Init 2 */
|
||||
|
||||
/* USER CODE END TIM16_Init 2 */
|
||||
HAL_TIM_MspPostInit(&htim16);
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief TIM17 Initialization Function
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
static void MX_TIM17_Init(void)
|
||||
{
|
||||
|
||||
/* USER CODE BEGIN TIM17_Init 0 */
|
||||
|
||||
/* USER CODE END TIM17_Init 0 */
|
||||
|
||||
TIM_OC_InitTypeDef sConfigOC = {0};
|
||||
TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig = {0};
|
||||
|
||||
/* USER CODE BEGIN TIM17_Init 1 */
|
||||
|
||||
/* USER CODE END TIM17_Init 1 */
|
||||
htim17.Instance = TIM17;
|
||||
htim17.Init.Prescaler = 0;
|
||||
htim17.Init.CounterMode = TIM_COUNTERMODE_UP;
|
||||
htim17.Init.Period = 65535;
|
||||
htim17.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
|
||||
htim17.Init.RepetitionCounter = 0;
|
||||
htim17.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
|
||||
if (HAL_TIM_Base_Init(&htim17) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
if (HAL_TIM_PWM_Init(&htim17) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
sConfigOC.OCMode = TIM_OCMODE_PWM1;
|
||||
sConfigOC.Pulse = 0;
|
||||
sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
|
||||
sConfigOC.OCNPolarity = TIM_OCNPOLARITY_HIGH;
|
||||
sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
|
||||
sConfigOC.OCIdleState = TIM_OCIDLESTATE_RESET;
|
||||
sConfigOC.OCNIdleState = TIM_OCNIDLESTATE_RESET;
|
||||
if (HAL_TIM_PWM_ConfigChannel(&htim17, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
sBreakDeadTimeConfig.OffStateRunMode = TIM_OSSR_DISABLE;
|
||||
sBreakDeadTimeConfig.OffStateIDLEMode = TIM_OSSI_DISABLE;
|
||||
sBreakDeadTimeConfig.LockLevel = TIM_LOCKLEVEL_OFF;
|
||||
sBreakDeadTimeConfig.DeadTime = 0;
|
||||
sBreakDeadTimeConfig.BreakState = TIM_BREAK_DISABLE;
|
||||
sBreakDeadTimeConfig.BreakPolarity = TIM_BREAKPOLARITY_HIGH;
|
||||
sBreakDeadTimeConfig.AutomaticOutput = TIM_AUTOMATICOUTPUT_DISABLE;
|
||||
if (HAL_TIMEx_ConfigBreakDeadTime(&htim17, &sBreakDeadTimeConfig) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
/* USER CODE BEGIN TIM17_Init 2 */
|
||||
|
||||
/* USER CODE END TIM17_Init 2 */
|
||||
HAL_TIM_MspPostInit(&htim17);
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief USART1 Initialization Function
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
static void MX_USART1_UART_Init(void)
|
||||
{
|
||||
|
||||
/* USER CODE BEGIN USART1_Init 0 */
|
||||
|
||||
/* USER CODE END USART1_Init 0 */
|
||||
|
||||
/* USER CODE BEGIN USART1_Init 1 */
|
||||
|
||||
/* USER CODE END USART1_Init 1 */
|
||||
huart1.Instance = USART1;
|
||||
huart1.Init.BaudRate = 115200;
|
||||
huart1.Init.WordLength = UART_WORDLENGTH_8B;
|
||||
huart1.Init.StopBits = UART_STOPBITS_1;
|
||||
huart1.Init.Parity = UART_PARITY_NONE;
|
||||
huart1.Init.Mode = UART_MODE_TX_RX;
|
||||
huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
|
||||
huart1.Init.OverSampling = UART_OVERSAMPLING_16;
|
||||
huart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
|
||||
huart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
|
||||
if (HAL_UART_Init(&huart1) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
/* USER CODE BEGIN USART1_Init 2 */
|
||||
|
||||
/* USER CODE END USART1_Init 2 */
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief GPIO Initialization Function
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
static void MX_GPIO_Init(void)
|
||||
{
|
||||
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||||
/* USER CODE BEGIN MX_GPIO_Init_1 */
|
||||
|
||||
/* USER CODE END MX_GPIO_Init_1 */
|
||||
|
||||
/* GPIO Ports Clock Enable */
|
||||
__HAL_RCC_GPIOF_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOA_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOB_CLK_ENABLE();
|
||||
|
||||
/*Configure GPIO pin Output Level */
|
||||
HAL_GPIO_WritePin(OUT1_GPIO_Port, OUT1_Pin, GPIO_PIN_RESET);
|
||||
|
||||
/*Configure GPIO pin : OUT1_Pin */
|
||||
GPIO_InitStruct.Pin = OUT1_Pin;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||
HAL_GPIO_Init(OUT1_GPIO_Port, &GPIO_InitStruct);
|
||||
|
||||
/*Configure GPIO pin : PB3 */
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_3;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||||
|
||||
/* USER CODE BEGIN MX_GPIO_Init_2 */
|
||||
|
||||
/* USER CODE END MX_GPIO_Init_2 */
|
||||
}
|
||||
|
||||
/* USER CODE BEGIN 4 */
|
||||
PUTCHAR_PROTOTYPE {
|
||||
HAL_UART_Transmit(&huart1, (uint8_t*) &ch, 1, HAL_MAX_DELAY);
|
||||
return ch;
|
||||
}
|
||||
/* USER CODE END 4 */
|
||||
|
||||
/**
|
||||
* @brief This function is executed in case of error occurrence.
|
||||
* @retval None
|
||||
*/
|
||||
void Error_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN Error_Handler_Debug */
|
||||
/* User can add his own implementation to report the HAL error return state */
|
||||
__disable_irq();
|
||||
while (1) {
|
||||
}
|
||||
/* USER CODE END Error_Handler_Debug */
|
||||
}
|
||||
#ifdef USE_FULL_ASSERT
|
||||
/**
|
||||
* @brief Reports the name of the source file and the source line number
|
||||
* where the assert_param error has occurred.
|
||||
* @param file: pointer to the source file name
|
||||
* @param line: assert_param error line source number
|
||||
* @retval None
|
||||
*/
|
||||
void assert_failed(uint8_t *file, uint32_t line)
|
||||
{
|
||||
/* USER CODE BEGIN 6 */
|
||||
/* User can add his own implementation to report the file name and line number,
|
||||
ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
|
||||
/* USER CODE END 6 */
|
||||
}
|
||||
#endif /* USE_FULL_ASSERT */
|
||||
33
Test2/Core/Src/math.c
Normal file
33
Test2/Core/Src/math.c
Normal file
@@ -0,0 +1,33 @@
|
||||
/*
|
||||
* math.c
|
||||
*
|
||||
* Created on: 2 февр. 2026 г.
|
||||
* Author: v0stap
|
||||
*/
|
||||
#include "main.h"
|
||||
|
||||
uint16_t map16_t(uint16_t x, uint16_t in_min, uint16_t in_max, uint16_t out_min, uint16_t out_max) {
|
||||
// Input validation: avoid division by zero
|
||||
if (in_max == in_min) {
|
||||
fprintf(stderr, "Error: Input range cannot be zero.\n");
|
||||
return out_min;
|
||||
} else {
|
||||
// Perform mapping
|
||||
return (uint16_t)(out_min + (x - in_min) * (out_max - out_min) / (in_max - in_min));
|
||||
}
|
||||
}
|
||||
|
||||
uint16_t LPF(unsigned short lpf_c, unsigned short value, unsigned short old_value) {
|
||||
// Averageing filtering
|
||||
|
||||
float tmp;
|
||||
|
||||
tmp = ((float) (value - old_value) * ((float) (lpf_c) / (float) 1000.0)); // filter
|
||||
if (tmp > 0)
|
||||
tmp += (float) 0.5; // roundup
|
||||
else
|
||||
tmp -= (float) 0.5;
|
||||
|
||||
return (uint16_t)((signed int) old_value + (signed int) tmp);
|
||||
|
||||
}
|
||||
556
Test2/Core/Src/stm32f0xx_hal_msp.c
Normal file
556
Test2/Core/Src/stm32f0xx_hal_msp.c
Normal file
@@ -0,0 +1,556 @@
|
||||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32f0xx_hal_msp.c
|
||||
* @brief This file provides code for the MSP Initialization
|
||||
* and de-Initialization codes.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2025 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "main.h"
|
||||
/* USER CODE BEGIN Includes */
|
||||
|
||||
/* USER CODE END Includes */
|
||||
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* USER CODE BEGIN TD */
|
||||
|
||||
/* USER CODE END TD */
|
||||
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN Define */
|
||||
|
||||
/* USER CODE END Define */
|
||||
|
||||
/* Private macro -------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN Macro */
|
||||
|
||||
/* USER CODE END Macro */
|
||||
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
/* USER CODE BEGIN PV */
|
||||
|
||||
/* USER CODE END PV */
|
||||
|
||||
/* Private function prototypes -----------------------------------------------*/
|
||||
/* USER CODE BEGIN PFP */
|
||||
|
||||
/* USER CODE END PFP */
|
||||
|
||||
/* External functions --------------------------------------------------------*/
|
||||
/* USER CODE BEGIN ExternalFunctions */
|
||||
|
||||
/* USER CODE END ExternalFunctions */
|
||||
|
||||
/* USER CODE BEGIN 0 */
|
||||
|
||||
/* USER CODE END 0 */
|
||||
|
||||
void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim);
|
||||
/**
|
||||
* Initializes the Global MSP.
|
||||
*/
|
||||
void HAL_MspInit(void)
|
||||
{
|
||||
|
||||
/* USER CODE BEGIN MspInit 0 */
|
||||
|
||||
/* USER CODE END MspInit 0 */
|
||||
|
||||
__HAL_RCC_SYSCFG_CLK_ENABLE();
|
||||
__HAL_RCC_PWR_CLK_ENABLE();
|
||||
|
||||
/* System interrupt init*/
|
||||
|
||||
/* USER CODE BEGIN MspInit 1 */
|
||||
|
||||
/* USER CODE END MspInit 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief ADC MSP Initialization
|
||||
* This function configures the hardware resources used in this example
|
||||
* @param hadc: ADC handle pointer
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
|
||||
{
|
||||
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||||
if(hadc->Instance==ADC1)
|
||||
{
|
||||
/* USER CODE BEGIN ADC1_MspInit 0 */
|
||||
|
||||
/* USER CODE END ADC1_MspInit 0 */
|
||||
/* Peripheral clock enable */
|
||||
__HAL_RCC_ADC1_CLK_ENABLE();
|
||||
|
||||
__HAL_RCC_GPIOA_CLK_ENABLE();
|
||||
/**ADC GPIO Configuration
|
||||
PA0 ------> ADC_IN0
|
||||
PA1 ------> ADC_IN1
|
||||
PA2 ------> ADC_IN2
|
||||
PA3 ------> ADC_IN3
|
||||
*/
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||
|
||||
/* USER CODE BEGIN ADC1_MspInit 1 */
|
||||
|
||||
/* USER CODE END ADC1_MspInit 1 */
|
||||
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief ADC MSP De-Initialization
|
||||
* This function freeze the hardware resources used in this example
|
||||
* @param hadc: ADC handle pointer
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc)
|
||||
{
|
||||
if(hadc->Instance==ADC1)
|
||||
{
|
||||
/* USER CODE BEGIN ADC1_MspDeInit 0 */
|
||||
|
||||
/* USER CODE END ADC1_MspDeInit 0 */
|
||||
/* Peripheral clock disable */
|
||||
__HAL_RCC_ADC1_CLK_DISABLE();
|
||||
|
||||
/**ADC GPIO Configuration
|
||||
PA0 ------> ADC_IN0
|
||||
PA1 ------> ADC_IN1
|
||||
PA2 ------> ADC_IN2
|
||||
PA3 ------> ADC_IN3
|
||||
*/
|
||||
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3);
|
||||
|
||||
/* USER CODE BEGIN ADC1_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END ADC1_MspDeInit 1 */
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief TIM_IC MSP Initialization
|
||||
* This function configures the hardware resources used in this example
|
||||
* @param htim_ic: TIM_IC handle pointer
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_TIM_IC_MspInit(TIM_HandleTypeDef* htim_ic)
|
||||
{
|
||||
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||||
if(htim_ic->Instance==TIM1)
|
||||
{
|
||||
/* USER CODE BEGIN TIM1_MspInit 0 */
|
||||
|
||||
/* USER CODE END TIM1_MspInit 0 */
|
||||
/* Peripheral clock enable */
|
||||
__HAL_RCC_TIM1_CLK_ENABLE();
|
||||
|
||||
__HAL_RCC_GPIOA_CLK_ENABLE();
|
||||
/**TIM1 GPIO Configuration
|
||||
PA8 ------> TIM1_CH1
|
||||
*/
|
||||
GPIO_InitStruct.Pin = IN0_Pin;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF2_TIM1;
|
||||
HAL_GPIO_Init(IN0_GPIO_Port, &GPIO_InitStruct);
|
||||
|
||||
/* USER CODE BEGIN TIM1_MspInit 1 */
|
||||
|
||||
/* USER CODE END TIM1_MspInit 1 */
|
||||
}
|
||||
else if(htim_ic->Instance==TIM2)
|
||||
{
|
||||
/* USER CODE BEGIN TIM2_MspInit 0 */
|
||||
|
||||
/* USER CODE END TIM2_MspInit 0 */
|
||||
/* Peripheral clock enable */
|
||||
__HAL_RCC_TIM2_CLK_ENABLE();
|
||||
|
||||
__HAL_RCC_GPIOA_CLK_ENABLE();
|
||||
/**TIM2 GPIO Configuration
|
||||
PA15 ------> TIM2_CH1
|
||||
*/
|
||||
GPIO_InitStruct.Pin = IN1_Pin;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF2_TIM2;
|
||||
HAL_GPIO_Init(IN1_GPIO_Port, &GPIO_InitStruct);
|
||||
|
||||
/* USER CODE BEGIN TIM2_MspInit 1 */
|
||||
|
||||
/* USER CODE END TIM2_MspInit 1 */
|
||||
}
|
||||
else if(htim_ic->Instance==TIM3)
|
||||
{
|
||||
/* USER CODE BEGIN TIM3_MspInit 0 */
|
||||
|
||||
/* USER CODE END TIM3_MspInit 0 */
|
||||
/* Peripheral clock enable */
|
||||
__HAL_RCC_TIM3_CLK_ENABLE();
|
||||
|
||||
__HAL_RCC_GPIOB_CLK_ENABLE();
|
||||
/**TIM3 GPIO Configuration
|
||||
PB5 ------> TIM3_CH2
|
||||
*/
|
||||
GPIO_InitStruct.Pin = IN2_Pin;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF1_TIM3;
|
||||
HAL_GPIO_Init(IN2_GPIO_Port, &GPIO_InitStruct);
|
||||
|
||||
/* USER CODE BEGIN TIM3_MspInit 1 */
|
||||
|
||||
/* USER CODE END TIM3_MspInit 1 */
|
||||
}
|
||||
else if(htim_ic->Instance==TIM15)
|
||||
{
|
||||
/* USER CODE BEGIN TIM15_MspInit 0 */
|
||||
|
||||
/* USER CODE END TIM15_MspInit 0 */
|
||||
/* Peripheral clock enable */
|
||||
__HAL_RCC_TIM15_CLK_ENABLE();
|
||||
|
||||
__HAL_RCC_GPIOB_CLK_ENABLE();
|
||||
/**TIM15 GPIO Configuration
|
||||
PB14 ------> TIM15_CH1
|
||||
*/
|
||||
GPIO_InitStruct.Pin = IN3_Pin;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF1_TIM15;
|
||||
HAL_GPIO_Init(IN3_GPIO_Port, &GPIO_InitStruct);
|
||||
|
||||
/* USER CODE BEGIN TIM15_MspInit 1 */
|
||||
|
||||
/* USER CODE END TIM15_MspInit 1 */
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief TIM_Base MSP Initialization
|
||||
* This function configures the hardware resources used in this example
|
||||
* @param htim_base: TIM_Base handle pointer
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
|
||||
{
|
||||
if(htim_base->Instance==TIM14)
|
||||
{
|
||||
/* USER CODE BEGIN TIM14_MspInit 0 */
|
||||
|
||||
/* USER CODE END TIM14_MspInit 0 */
|
||||
/* Peripheral clock enable */
|
||||
__HAL_RCC_TIM14_CLK_ENABLE();
|
||||
/* USER CODE BEGIN TIM14_MspInit 1 */
|
||||
|
||||
/* USER CODE END TIM14_MspInit 1 */
|
||||
}
|
||||
else if(htim_base->Instance==TIM16)
|
||||
{
|
||||
/* USER CODE BEGIN TIM16_MspInit 0 */
|
||||
|
||||
/* USER CODE END TIM16_MspInit 0 */
|
||||
/* Peripheral clock enable */
|
||||
__HAL_RCC_TIM16_CLK_ENABLE();
|
||||
/* USER CODE BEGIN TIM16_MspInit 1 */
|
||||
|
||||
/* USER CODE END TIM16_MspInit 1 */
|
||||
}
|
||||
else if(htim_base->Instance==TIM17)
|
||||
{
|
||||
/* USER CODE BEGIN TIM17_MspInit 0 */
|
||||
|
||||
/* USER CODE END TIM17_MspInit 0 */
|
||||
/* Peripheral clock enable */
|
||||
__HAL_RCC_TIM17_CLK_ENABLE();
|
||||
/* USER CODE BEGIN TIM17_MspInit 1 */
|
||||
|
||||
/* USER CODE END TIM17_MspInit 1 */
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim)
|
||||
{
|
||||
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||||
if(htim->Instance==TIM14)
|
||||
{
|
||||
/* USER CODE BEGIN TIM14_MspPostInit 0 */
|
||||
|
||||
/* USER CODE END TIM14_MspPostInit 0 */
|
||||
__HAL_RCC_GPIOA_CLK_ENABLE();
|
||||
/**TIM14 GPIO Configuration
|
||||
PA4 ------> TIM14_CH1
|
||||
*/
|
||||
GPIO_InitStruct.Pin = OUT0_Pin;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF4_TIM14;
|
||||
HAL_GPIO_Init(OUT0_GPIO_Port, &GPIO_InitStruct);
|
||||
|
||||
/* USER CODE BEGIN TIM14_MspPostInit 1 */
|
||||
|
||||
/* USER CODE END TIM14_MspPostInit 1 */
|
||||
}
|
||||
else if(htim->Instance==TIM16)
|
||||
{
|
||||
/* USER CODE BEGIN TIM16_MspPostInit 0 */
|
||||
|
||||
/* USER CODE END TIM16_MspPostInit 0 */
|
||||
|
||||
__HAL_RCC_GPIOA_CLK_ENABLE();
|
||||
/**TIM16 GPIO Configuration
|
||||
PA6 ------> TIM16_CH1
|
||||
*/
|
||||
GPIO_InitStruct.Pin = OUT2_Pin;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF5_TIM16;
|
||||
HAL_GPIO_Init(OUT2_GPIO_Port, &GPIO_InitStruct);
|
||||
|
||||
/* USER CODE BEGIN TIM16_MspPostInit 1 */
|
||||
|
||||
/* USER CODE END TIM16_MspPostInit 1 */
|
||||
}
|
||||
else if(htim->Instance==TIM17)
|
||||
{
|
||||
/* USER CODE BEGIN TIM17_MspPostInit 0 */
|
||||
|
||||
/* USER CODE END TIM17_MspPostInit 0 */
|
||||
|
||||
__HAL_RCC_GPIOA_CLK_ENABLE();
|
||||
/**TIM17 GPIO Configuration
|
||||
PA7 ------> TIM17_CH1
|
||||
*/
|
||||
GPIO_InitStruct.Pin = OUT3_Pin;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF5_TIM17;
|
||||
HAL_GPIO_Init(OUT3_GPIO_Port, &GPIO_InitStruct);
|
||||
|
||||
/* USER CODE BEGIN TIM17_MspPostInit 1 */
|
||||
|
||||
/* USER CODE END TIM17_MspPostInit 1 */
|
||||
}
|
||||
|
||||
}
|
||||
/**
|
||||
* @brief TIM_IC MSP De-Initialization
|
||||
* This function freeze the hardware resources used in this example
|
||||
* @param htim_ic: TIM_IC handle pointer
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_TIM_IC_MspDeInit(TIM_HandleTypeDef* htim_ic)
|
||||
{
|
||||
if(htim_ic->Instance==TIM1)
|
||||
{
|
||||
/* USER CODE BEGIN TIM1_MspDeInit 0 */
|
||||
|
||||
/* USER CODE END TIM1_MspDeInit 0 */
|
||||
/* Peripheral clock disable */
|
||||
__HAL_RCC_TIM1_CLK_DISABLE();
|
||||
|
||||
/**TIM1 GPIO Configuration
|
||||
PA8 ------> TIM1_CH1
|
||||
*/
|
||||
HAL_GPIO_DeInit(IN0_GPIO_Port, IN0_Pin);
|
||||
|
||||
/* USER CODE BEGIN TIM1_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END TIM1_MspDeInit 1 */
|
||||
}
|
||||
else if(htim_ic->Instance==TIM2)
|
||||
{
|
||||
/* USER CODE BEGIN TIM2_MspDeInit 0 */
|
||||
|
||||
/* USER CODE END TIM2_MspDeInit 0 */
|
||||
/* Peripheral clock disable */
|
||||
__HAL_RCC_TIM2_CLK_DISABLE();
|
||||
|
||||
/**TIM2 GPIO Configuration
|
||||
PA15 ------> TIM2_CH1
|
||||
*/
|
||||
HAL_GPIO_DeInit(IN1_GPIO_Port, IN1_Pin);
|
||||
|
||||
/* USER CODE BEGIN TIM2_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END TIM2_MspDeInit 1 */
|
||||
}
|
||||
else if(htim_ic->Instance==TIM3)
|
||||
{
|
||||
/* USER CODE BEGIN TIM3_MspDeInit 0 */
|
||||
|
||||
/* USER CODE END TIM3_MspDeInit 0 */
|
||||
/* Peripheral clock disable */
|
||||
__HAL_RCC_TIM3_CLK_DISABLE();
|
||||
|
||||
/**TIM3 GPIO Configuration
|
||||
PB5 ------> TIM3_CH2
|
||||
*/
|
||||
HAL_GPIO_DeInit(IN2_GPIO_Port, IN2_Pin);
|
||||
|
||||
/* USER CODE BEGIN TIM3_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END TIM3_MspDeInit 1 */
|
||||
}
|
||||
else if(htim_ic->Instance==TIM15)
|
||||
{
|
||||
/* USER CODE BEGIN TIM15_MspDeInit 0 */
|
||||
|
||||
/* USER CODE END TIM15_MspDeInit 0 */
|
||||
/* Peripheral clock disable */
|
||||
__HAL_RCC_TIM15_CLK_DISABLE();
|
||||
|
||||
/**TIM15 GPIO Configuration
|
||||
PB14 ------> TIM15_CH1
|
||||
*/
|
||||
HAL_GPIO_DeInit(IN3_GPIO_Port, IN3_Pin);
|
||||
|
||||
/* USER CODE BEGIN TIM15_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END TIM15_MspDeInit 1 */
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief TIM_Base MSP De-Initialization
|
||||
* This function freeze the hardware resources used in this example
|
||||
* @param htim_base: TIM_Base handle pointer
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base)
|
||||
{
|
||||
if(htim_base->Instance==TIM14)
|
||||
{
|
||||
/* USER CODE BEGIN TIM14_MspDeInit 0 */
|
||||
|
||||
/* USER CODE END TIM14_MspDeInit 0 */
|
||||
/* Peripheral clock disable */
|
||||
__HAL_RCC_TIM14_CLK_DISABLE();
|
||||
/* USER CODE BEGIN TIM14_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END TIM14_MspDeInit 1 */
|
||||
}
|
||||
else if(htim_base->Instance==TIM16)
|
||||
{
|
||||
/* USER CODE BEGIN TIM16_MspDeInit 0 */
|
||||
|
||||
/* USER CODE END TIM16_MspDeInit 0 */
|
||||
/* Peripheral clock disable */
|
||||
__HAL_RCC_TIM16_CLK_DISABLE();
|
||||
/* USER CODE BEGIN TIM16_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END TIM16_MspDeInit 1 */
|
||||
}
|
||||
else if(htim_base->Instance==TIM17)
|
||||
{
|
||||
/* USER CODE BEGIN TIM17_MspDeInit 0 */
|
||||
|
||||
/* USER CODE END TIM17_MspDeInit 0 */
|
||||
/* Peripheral clock disable */
|
||||
__HAL_RCC_TIM17_CLK_DISABLE();
|
||||
/* USER CODE BEGIN TIM17_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END TIM17_MspDeInit 1 */
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief UART MSP Initialization
|
||||
* This function configures the hardware resources used in this example
|
||||
* @param huart: UART handle pointer
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_UART_MspInit(UART_HandleTypeDef* huart)
|
||||
{
|
||||
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||||
if(huart->Instance==USART1)
|
||||
{
|
||||
/* USER CODE BEGIN USART1_MspInit 0 */
|
||||
|
||||
/* USER CODE END USART1_MspInit 0 */
|
||||
/* Peripheral clock enable */
|
||||
__HAL_RCC_USART1_CLK_ENABLE();
|
||||
|
||||
__HAL_RCC_GPIOA_CLK_ENABLE();
|
||||
/**USART1 GPIO Configuration
|
||||
PA9 ------> USART1_TX
|
||||
PA10 ------> USART1_RX
|
||||
*/
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_9|GPIO_PIN_10;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF1_USART1;
|
||||
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||
|
||||
/* USER CODE BEGIN USART1_MspInit 1 */
|
||||
|
||||
/* USER CODE END USART1_MspInit 1 */
|
||||
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief UART MSP De-Initialization
|
||||
* This function freeze the hardware resources used in this example
|
||||
* @param huart: UART handle pointer
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
|
||||
{
|
||||
if(huart->Instance==USART1)
|
||||
{
|
||||
/* USER CODE BEGIN USART1_MspDeInit 0 */
|
||||
|
||||
/* USER CODE END USART1_MspDeInit 0 */
|
||||
/* Peripheral clock disable */
|
||||
__HAL_RCC_USART1_CLK_DISABLE();
|
||||
|
||||
/**USART1 GPIO Configuration
|
||||
PA9 ------> USART1_TX
|
||||
PA10 ------> USART1_RX
|
||||
*/
|
||||
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_9|GPIO_PIN_10);
|
||||
|
||||
/* USER CODE BEGIN USART1_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END USART1_MspDeInit 1 */
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/* USER CODE BEGIN 1 */
|
||||
|
||||
/* USER CODE END 1 */
|
||||
159
Test2/Core/Src/stm32f0xx_it.c
Normal file
159
Test2/Core/Src/stm32f0xx_it.c
Normal file
@@ -0,0 +1,159 @@
|
||||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32f0xx_it.c
|
||||
* @brief Interrupt Service Routines.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2025 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "main.h"
|
||||
#include "stm32f0xx_it.h"
|
||||
/* Private includes ----------------------------------------------------------*/
|
||||
/* USER CODE BEGIN Includes */
|
||||
/* USER CODE END Includes */
|
||||
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* USER CODE BEGIN TD */
|
||||
|
||||
/* USER CODE END TD */
|
||||
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN PD */
|
||||
|
||||
/* USER CODE END PD */
|
||||
|
||||
/* Private macro -------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN PM */
|
||||
|
||||
/* USER CODE END PM */
|
||||
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
/* USER CODE BEGIN PV */
|
||||
|
||||
/* USER CODE END PV */
|
||||
|
||||
/* Private function prototypes -----------------------------------------------*/
|
||||
/* USER CODE BEGIN PFP */
|
||||
|
||||
/* USER CODE END PFP */
|
||||
|
||||
/* Private user code ---------------------------------------------------------*/
|
||||
/* USER CODE BEGIN 0 */
|
||||
|
||||
/* USER CODE END 0 */
|
||||
|
||||
/* External variables --------------------------------------------------------*/
|
||||
extern PCD_HandleTypeDef hpcd_USB_FS;
|
||||
/* USER CODE BEGIN EV */
|
||||
|
||||
/* USER CODE END EV */
|
||||
|
||||
/******************************************************************************/
|
||||
/* Cortex-M0 Processor Interruption and Exception Handlers */
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* @brief This function handles Non maskable interrupt.
|
||||
*/
|
||||
void NMI_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
|
||||
|
||||
/* USER CODE END NonMaskableInt_IRQn 0 */
|
||||
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
|
||||
while (1)
|
||||
{
|
||||
}
|
||||
/* USER CODE END NonMaskableInt_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Hard fault interrupt.
|
||||
*/
|
||||
void HardFault_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN HardFault_IRQn 0 */
|
||||
|
||||
/* USER CODE END HardFault_IRQn 0 */
|
||||
while (1)
|
||||
{
|
||||
/* USER CODE BEGIN W1_HardFault_IRQn 0 */
|
||||
/* USER CODE END W1_HardFault_IRQn 0 */
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles System service call via SWI instruction.
|
||||
*/
|
||||
void SVC_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN SVC_IRQn 0 */
|
||||
|
||||
/* USER CODE END SVC_IRQn 0 */
|
||||
/* USER CODE BEGIN SVC_IRQn 1 */
|
||||
|
||||
/* USER CODE END SVC_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Pendable request for system service.
|
||||
*/
|
||||
void PendSV_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN PendSV_IRQn 0 */
|
||||
|
||||
/* USER CODE END PendSV_IRQn 0 */
|
||||
/* USER CODE BEGIN PendSV_IRQn 1 */
|
||||
|
||||
/* USER CODE END PendSV_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles System tick timer.
|
||||
*/
|
||||
void SysTick_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN SysTick_IRQn 0 */
|
||||
|
||||
/* USER CODE END SysTick_IRQn 0 */
|
||||
HAL_IncTick();
|
||||
/* USER CODE BEGIN SysTick_IRQn 1 */
|
||||
|
||||
/* USER CODE END SysTick_IRQn 1 */
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/* STM32F0xx Peripheral Interrupt Handlers */
|
||||
/* Add here the Interrupt Handlers for the used peripherals. */
|
||||
/* For the available peripheral interrupt handler names, */
|
||||
/* please refer to the startup file (startup_stm32f0xx.s). */
|
||||
/******************************************************************************/
|
||||
|
||||
/**
|
||||
* @brief This function handles USB global interrupt / USB wake-up interrupt through EXTI line 18.
|
||||
*/
|
||||
void USB_IRQHandler(void)
|
||||
{
|
||||
/* USER CODE BEGIN USB_IRQn 0 */
|
||||
|
||||
/* USER CODE END USB_IRQn 0 */
|
||||
HAL_PCD_IRQHandler(&hpcd_USB_FS);
|
||||
/* USER CODE BEGIN USB_IRQn 1 */
|
||||
|
||||
/* USER CODE END USB_IRQn 1 */
|
||||
}
|
||||
|
||||
/* USER CODE BEGIN 1 */
|
||||
|
||||
/* USER CODE END 1 */
|
||||
178
Test2/Core/Src/syscalls.c
Normal file
178
Test2/Core/Src/syscalls.c
Normal file
@@ -0,0 +1,178 @@
|
||||
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file syscalls.c
|
||||
* @author Auto-generated by STM32CubeIDE
|
||||
* @brief STM32CubeIDE Minimal System calls file
|
||||
*
|
||||
* For more information about which c-functions
|
||||
* need which of these lowlevel functions
|
||||
* please consult the Newlib libc-manual
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2020-2025 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Includes */
|
||||
#include <sys/stat.h>
|
||||
#include <stdlib.h>
|
||||
#include <errno.h>
|
||||
#include <stdio.h>
|
||||
#include <signal.h>
|
||||
#include <time.h>
|
||||
#include <sys/time.h>
|
||||
#include <sys/times.h>
|
||||
|
||||
|
||||
/* Variables */
|
||||
extern int __io_putchar(int ch) __attribute__((weak));
|
||||
extern int __io_getchar(void) __attribute__((weak));
|
||||
|
||||
|
||||
|
||||
char *__env[1] = { 0 };
|
||||
char **environ = __env;
|
||||
|
||||
|
||||
/* Functions */
|
||||
void initialise_monitor_handles()
|
||||
{
|
||||
}
|
||||
|
||||
int _getpid(void)
|
||||
{
|
||||
return 1;
|
||||
}
|
||||
|
||||
int _kill(int pid, int sig)
|
||||
{
|
||||
(void)pid;
|
||||
(void)sig;
|
||||
errno = EINVAL;
|
||||
return -1;
|
||||
}
|
||||
|
||||
void _exit (int status)
|
||||
{
|
||||
_kill(status, -1);
|
||||
while (1) {} /* Make sure we hang here */
|
||||
}
|
||||
|
||||
__attribute__((weak)) int _read(int file, char *ptr, int len)
|
||||
{
|
||||
(void)file;
|
||||
int DataIdx;
|
||||
|
||||
for (DataIdx = 0; DataIdx < len; DataIdx++)
|
||||
{
|
||||
*ptr++ = __io_getchar();
|
||||
}
|
||||
|
||||
return len;
|
||||
}
|
||||
|
||||
__attribute__((weak)) int _write(int file, char *ptr, int len)
|
||||
{
|
||||
(void)file;
|
||||
int DataIdx;
|
||||
|
||||
for (DataIdx = 0; DataIdx < len; DataIdx++)
|
||||
{
|
||||
__io_putchar(*ptr++);
|
||||
}
|
||||
return len;
|
||||
}
|
||||
|
||||
int _close(int file)
|
||||
{
|
||||
(void)file;
|
||||
return -1;
|
||||
}
|
||||
|
||||
|
||||
int _fstat(int file, struct stat *st)
|
||||
{
|
||||
(void)file;
|
||||
st->st_mode = S_IFCHR;
|
||||
return 0;
|
||||
}
|
||||
|
||||
int _isatty(int file)
|
||||
{
|
||||
(void)file;
|
||||
return 1;
|
||||
}
|
||||
|
||||
int _lseek(int file, int ptr, int dir)
|
||||
{
|
||||
(void)file;
|
||||
(void)ptr;
|
||||
(void)dir;
|
||||
return 0;
|
||||
}
|
||||
|
||||
int _open(char *path, int flags, ...)
|
||||
{
|
||||
(void)path;
|
||||
(void)flags;
|
||||
/* Pretend like we always fail */
|
||||
return -1;
|
||||
}
|
||||
|
||||
int _wait(int *status)
|
||||
{
|
||||
(void)status;
|
||||
errno = ECHILD;
|
||||
return -1;
|
||||
}
|
||||
|
||||
int _unlink(char *name)
|
||||
{
|
||||
(void)name;
|
||||
errno = ENOENT;
|
||||
return -1;
|
||||
}
|
||||
|
||||
int _times(struct tms *buf)
|
||||
{
|
||||
(void)buf;
|
||||
return -1;
|
||||
}
|
||||
|
||||
int _stat(char *file, struct stat *st)
|
||||
{
|
||||
(void)file;
|
||||
st->st_mode = S_IFCHR;
|
||||
return 0;
|
||||
}
|
||||
|
||||
int _link(char *old, char *new)
|
||||
{
|
||||
(void)old;
|
||||
(void)new;
|
||||
errno = EMLINK;
|
||||
return -1;
|
||||
}
|
||||
|
||||
int _fork(void)
|
||||
{
|
||||
errno = EAGAIN;
|
||||
return -1;
|
||||
}
|
||||
|
||||
int _execve(char *name, char **argv, char **env)
|
||||
{
|
||||
(void)name;
|
||||
(void)argv;
|
||||
(void)env;
|
||||
errno = ENOMEM;
|
||||
return -1;
|
||||
}
|
||||
79
Test2/Core/Src/sysmem.c
Normal file
79
Test2/Core/Src/sysmem.c
Normal file
@@ -0,0 +1,79 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file sysmem.c
|
||||
* @author Generated by STM32CubeIDE
|
||||
* @brief STM32CubeIDE System Memory calls file
|
||||
*
|
||||
* For more information about which C functions
|
||||
* need which of these lowlevel functions
|
||||
* please consult the newlib libc manual
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2025 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Includes */
|
||||
#include <errno.h>
|
||||
#include <stdint.h>
|
||||
|
||||
/**
|
||||
* Pointer to the current high watermark of the heap usage
|
||||
*/
|
||||
static uint8_t *__sbrk_heap_end = NULL;
|
||||
|
||||
/**
|
||||
* @brief _sbrk() allocates memory to the newlib heap and is used by malloc
|
||||
* and others from the C library
|
||||
*
|
||||
* @verbatim
|
||||
* ############################################################################
|
||||
* # .data # .bss # newlib heap # MSP stack #
|
||||
* # # # # Reserved by _Min_Stack_Size #
|
||||
* ############################################################################
|
||||
* ^-- RAM start ^-- _end _estack, RAM end --^
|
||||
* @endverbatim
|
||||
*
|
||||
* This implementation starts allocating at the '_end' linker symbol
|
||||
* The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
|
||||
* The implementation considers '_estack' linker symbol to be RAM end
|
||||
* NOTE: If the MSP stack, at any point during execution, grows larger than the
|
||||
* reserved size, please increase the '_Min_Stack_Size'.
|
||||
*
|
||||
* @param incr Memory size
|
||||
* @return Pointer to allocated memory
|
||||
*/
|
||||
void *_sbrk(ptrdiff_t incr)
|
||||
{
|
||||
extern uint8_t _end; /* Symbol defined in the linker script */
|
||||
extern uint8_t _estack; /* Symbol defined in the linker script */
|
||||
extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
|
||||
const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
|
||||
const uint8_t *max_heap = (uint8_t *)stack_limit;
|
||||
uint8_t *prev_heap_end;
|
||||
|
||||
/* Initialize heap end at first call */
|
||||
if (NULL == __sbrk_heap_end)
|
||||
{
|
||||
__sbrk_heap_end = &_end;
|
||||
}
|
||||
|
||||
/* Protect heap from growing into the reserved MSP stack */
|
||||
if (__sbrk_heap_end + incr > max_heap)
|
||||
{
|
||||
errno = ENOMEM;
|
||||
return (void *)-1;
|
||||
}
|
||||
|
||||
prev_heap_end = __sbrk_heap_end;
|
||||
__sbrk_heap_end += incr;
|
||||
|
||||
return (void *)prev_heap_end;
|
||||
}
|
||||
249
Test2/Core/Src/system_stm32f0xx.c
Normal file
249
Test2/Core/Src/system_stm32f0xx.c
Normal file
@@ -0,0 +1,249 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file system_stm32f0xx.c
|
||||
* @author MCD Application Team
|
||||
* @brief CMSIS Cortex-M0 Device Peripheral Access Layer System Source File.
|
||||
*
|
||||
* 1. This file provides two functions and one global variable to be called from
|
||||
* user application:
|
||||
* - SystemInit(): This function is called at startup just after reset and
|
||||
* before branch to main program. This call is made inside
|
||||
* the "startup_stm32f0xx.s" file.
|
||||
*
|
||||
* - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
|
||||
* by the user application to setup the SysTick
|
||||
* timer or configure other parameters.
|
||||
*
|
||||
* - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
|
||||
* be called whenever the core clock is changed
|
||||
* during program execution.
|
||||
*
|
||||
*
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/** @addtogroup CMSIS
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup stm32f0xx_system
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32F0xx_System_Private_Includes
|
||||
* @{
|
||||
*/
|
||||
|
||||
#include "stm32f0xx.h"
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32F0xx_System_Private_TypesDefinitions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32F0xx_System_Private_Defines
|
||||
* @{
|
||||
*/
|
||||
#if !defined (HSE_VALUE)
|
||||
#define HSE_VALUE ((uint32_t)8000000) /*!< Default value of the External oscillator in Hz.
|
||||
This value can be provided and adapted by the user application. */
|
||||
#endif /* HSE_VALUE */
|
||||
|
||||
#if !defined (HSI_VALUE)
|
||||
#define HSI_VALUE ((uint32_t)8000000) /*!< Default value of the Internal oscillator in Hz.
|
||||
This value can be provided and adapted by the user application. */
|
||||
#endif /* HSI_VALUE */
|
||||
|
||||
#if !defined (HSI48_VALUE)
|
||||
#define HSI48_VALUE ((uint32_t)48000000) /*!< Default value of the HSI48 Internal oscillator in Hz.
|
||||
This value can be provided and adapted by the user application. */
|
||||
#endif /* HSI48_VALUE */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32F0xx_System_Private_Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32F0xx_System_Private_Variables
|
||||
* @{
|
||||
*/
|
||||
/* This variable is updated in three ways:
|
||||
1) by calling CMSIS function SystemCoreClockUpdate()
|
||||
2) by calling HAL API function HAL_RCC_GetHCLKFreq()
|
||||
3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
|
||||
Note: If you use this function to configure the system clock; then there
|
||||
is no need to call the 2 first functions listed above, since SystemCoreClock
|
||||
variable is updated automatically.
|
||||
*/
|
||||
uint32_t SystemCoreClock = 8000000;
|
||||
|
||||
const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
|
||||
const uint8_t APBPrescTable[8] = {0, 0, 0, 0, 1, 2, 3, 4};
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32F0xx_System_Private_FunctionPrototypes
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32F0xx_System_Private_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Setup the microcontroller system
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void SystemInit(void)
|
||||
{
|
||||
/* NOTE :SystemInit(): This function is called at startup just after reset and
|
||||
before branch to main program. This call is made inside
|
||||
the "startup_stm32f0xx.s" file.
|
||||
User can setups the default system clock (System clock source, PLL Multiplier
|
||||
and Divider factors, AHB/APBx prescalers and Flash settings).
|
||||
*/
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Update SystemCoreClock variable according to Clock Register Values.
|
||||
* The SystemCoreClock variable contains the core clock (HCLK), it can
|
||||
* be used by the user application to setup the SysTick timer or configure
|
||||
* other parameters.
|
||||
*
|
||||
* @note Each time the core clock (HCLK) changes, this function must be called
|
||||
* to update SystemCoreClock variable value. Otherwise, any configuration
|
||||
* based on this variable will be incorrect.
|
||||
*
|
||||
* @note - The system frequency computed by this function is not the real
|
||||
* frequency in the chip. It is calculated based on the predefined
|
||||
* constant and the selected clock source:
|
||||
*
|
||||
* - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
|
||||
*
|
||||
* - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
|
||||
*
|
||||
* - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)
|
||||
* or HSI_VALUE(*) multiplied/divided by the PLL factors.
|
||||
*
|
||||
* - If SYSCLK source is HSI48, SystemCoreClock will contain the HSI48_VALUE(***)
|
||||
*
|
||||
* (*) HSI_VALUE is a constant defined in stm32f0xx_hal_conf.h file (default value
|
||||
* 8 MHz) but the real value may vary depending on the variations
|
||||
* in voltage and temperature.
|
||||
*
|
||||
* (**) HSE_VALUE is a constant defined in stm32f0xx_hal_conf.h file (its value
|
||||
* depends on the application requirements), user has to ensure that HSE_VALUE
|
||||
* is same as the real frequency of the crystal used. Otherwise, this function
|
||||
* may have wrong result.
|
||||
*
|
||||
* (***) HSI48_VALUE is a constant defined in stm32f0xx_hal_conf.h file (default value
|
||||
* 48 MHz) but the real value may vary depending on the variations
|
||||
* in voltage and temperature.
|
||||
*
|
||||
* - The result of this function could be not correct when using fractional
|
||||
* value for HSE crystal.
|
||||
*
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void SystemCoreClockUpdate (void)
|
||||
{
|
||||
uint32_t tmp = 0, pllmull = 0, pllsource = 0, predivfactor = 0;
|
||||
|
||||
/* Get SYSCLK source -------------------------------------------------------*/
|
||||
tmp = RCC->CFGR & RCC_CFGR_SWS;
|
||||
|
||||
switch (tmp)
|
||||
{
|
||||
case RCC_CFGR_SWS_HSI: /* HSI used as system clock */
|
||||
SystemCoreClock = HSI_VALUE;
|
||||
break;
|
||||
case RCC_CFGR_SWS_HSE: /* HSE used as system clock */
|
||||
SystemCoreClock = HSE_VALUE;
|
||||
break;
|
||||
case RCC_CFGR_SWS_PLL: /* PLL used as system clock */
|
||||
/* Get PLL clock source and multiplication factor ----------------------*/
|
||||
pllmull = RCC->CFGR & RCC_CFGR_PLLMUL;
|
||||
pllsource = RCC->CFGR & RCC_CFGR_PLLSRC;
|
||||
pllmull = ( pllmull >> 18) + 2;
|
||||
predivfactor = (RCC->CFGR2 & RCC_CFGR2_PREDIV) + 1;
|
||||
|
||||
if (pllsource == RCC_CFGR_PLLSRC_HSE_PREDIV)
|
||||
{
|
||||
/* HSE used as PLL clock source : SystemCoreClock = HSE/PREDIV * PLLMUL */
|
||||
SystemCoreClock = (HSE_VALUE/predivfactor) * pllmull;
|
||||
}
|
||||
#if defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || defined(STM32F091xC) || defined(STM32F098xx)
|
||||
else if (pllsource == RCC_CFGR_PLLSRC_HSI48_PREDIV)
|
||||
{
|
||||
/* HSI48 used as PLL clock source : SystemCoreClock = HSI48/PREDIV * PLLMUL */
|
||||
SystemCoreClock = (HSI48_VALUE/predivfactor) * pllmull;
|
||||
}
|
||||
#endif /* STM32F042x6 || STM32F048xx || STM32F071xB || STM32F072xB || STM32F078xx || STM32F091xC || STM32F098xx */
|
||||
else
|
||||
{
|
||||
#if defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F070x6) \
|
||||
|| defined(STM32F078xx) || defined(STM32F071xB) || defined(STM32F072xB) \
|
||||
|| defined(STM32F070xB) || defined(STM32F091xC) || defined(STM32F098xx) || defined(STM32F030xC)
|
||||
/* HSI used as PLL clock source : SystemCoreClock = HSI/PREDIV * PLLMUL */
|
||||
SystemCoreClock = (HSI_VALUE/predivfactor) * pllmull;
|
||||
#else
|
||||
/* HSI used as PLL clock source : SystemCoreClock = HSI/2 * PLLMUL */
|
||||
SystemCoreClock = (HSI_VALUE >> 1) * pllmull;
|
||||
#endif /* STM32F042x6 || STM32F048xx || STM32F070x6 ||
|
||||
STM32F071xB || STM32F072xB || STM32F078xx || STM32F070xB ||
|
||||
STM32F091xC || STM32F098xx || STM32F030xC */
|
||||
}
|
||||
break;
|
||||
default: /* HSI used as system clock */
|
||||
SystemCoreClock = HSI_VALUE;
|
||||
break;
|
||||
}
|
||||
/* Compute HCLK clock frequency ----------------*/
|
||||
/* Get HCLK prescaler */
|
||||
tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
|
||||
/* HCLK clock frequency */
|
||||
SystemCoreClock >>= tmp;
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
358
Test2/Core/Src/timers.c
Normal file
358
Test2/Core/Src/timers.c
Normal file
@@ -0,0 +1,358 @@
|
||||
/*
|
||||
* timers.c
|
||||
*
|
||||
* Created on: 4 янв. 2026 г.
|
||||
* Author: v0stap
|
||||
*/
|
||||
|
||||
#include "main.h"
|
||||
|
||||
void Timers_Init(void) {
|
||||
var.Send_Data_IRQ = 0;
|
||||
TIM1_Init();
|
||||
TIM2_Init();
|
||||
TIM3_Init();
|
||||
TIM7_Init();
|
||||
TIM14_Init();
|
||||
TIM15_Init();
|
||||
TIM16_Init();
|
||||
TIM17_Init();
|
||||
TIM6_Init();
|
||||
|
||||
//Init Timer1 PWM Input 1
|
||||
|
||||
}
|
||||
void TIM1_Init(void) { //configure IN1 as Iddle input PA8 TIM1 CH1
|
||||
// PB4 AF1 TIM3 Input1
|
||||
RCC->AHBENR |= RCC_AHBENR_GPIOAEN;
|
||||
GPIOA->MODER &= ~(3 << (8 * 2));
|
||||
GPIOA->MODER |= (2 << (8 * 2));
|
||||
GPIOA->OTYPER &= ~(1 << (8 * 1));
|
||||
GPIOA->OSPEEDR &= ~(3 << (8 * 2));
|
||||
GPIOA->PUPDR &= ~(3 << (8 * 2));
|
||||
GPIOA->AFR[1] &= ~(15 << (0 * 4));
|
||||
GPIOA->AFR[1] |= (2 << (0 * 4));
|
||||
|
||||
RCC->APB2ENR |= RCC_APB2ENR_TIM1EN;
|
||||
/* (1) Select the active input TI1 for TIM3_CCR1 (CC1S = 01),
|
||||
select the active input TI1 for TIM3_CCR2 (CC2S = 10) */
|
||||
/* (2) Select TI1FP1 as valid trigger input (TS = 101)
|
||||
configure the slave mode in reset mode (SMS = 100) */
|
||||
/* (3) Enable capture by setting CC1E and CC2E
|
||||
select the rising edge on CC1 and CC1N (CC1P = 0 and CC1NP = 0, reset
|
||||
value),
|
||||
select the falling edge on CC2 (CC2P = 1). */
|
||||
/* (4) Enable interrupt on Capture/Compare 1 */
|
||||
/* (5) Enable counter */
|
||||
TIM1->CCMR1 |= TIM_CCMR1_CC1S_0 | TIM_CCMR1_CC2S_1; /* (1)*/
|
||||
TIM1->SMCR |= TIM_SMCR_TS_2 | TIM_SMCR_TS_0 | TIM_SMCR_SMS_2; /* (2) */
|
||||
TIM1->CCER |= TIM_CCER_CC1E | TIM_CCER_CC2E | TIM_CCER_CC2P; /* (3) */
|
||||
TIM1->DIER |= TIM_DIER_CC1IE; /* (4) */
|
||||
TIM1->CR1 |= TIM_CR1_CEN; /* (5) */
|
||||
NVIC_EnableIRQ(TIM1_CC_IRQn);
|
||||
}
|
||||
|
||||
void TIM2_Init(void) { //configure IN1 as PWM input PA15 TIM2
|
||||
// PB4 AF1 TIM3 Input1
|
||||
RCC->AHBENR |= RCC_AHBENR_GPIOBEN;
|
||||
GPIOA->MODER &= ~(3 << (15 * 2));
|
||||
GPIOA->MODER |= (2 << (15 * 2));
|
||||
GPIOA->OTYPER &= ~(1 << (15 * 1));
|
||||
GPIOA->OSPEEDR &= ~(3 << (15 * 2));
|
||||
GPIOA->PUPDR &= ~(3 << (15 * 2));
|
||||
GPIOA->AFR[1] &= ~(15 << (7 * 4));
|
||||
GPIOA->AFR[1] |= (2 << (7 * 4));
|
||||
RCC->APB1ENR |= RCC_APB1ENR_TIM2EN;
|
||||
/* (1) Select the active input TI1 for TIM3_CCR1 (CC1S = 01),
|
||||
select the active input TI1 for TIM3_CCR2 (CC2S = 10) */
|
||||
/* (2) Select TI1FP1 as valid trigger input (TS = 101)
|
||||
configure the slave mode in reset mode (SMS = 100) */
|
||||
/* (3) Enable capture by setting CC1E and CC2E
|
||||
select the rising edge on CC1 and CC1N (CC1P = 0 and CC1NP = 0, reset
|
||||
value),
|
||||
select the falling edge on CC2 (CC2P = 1). */
|
||||
/* (4) Enable interrupt on Capture/Compare 1 */
|
||||
/* (5) Enable counter */
|
||||
TIM2->CCMR1 |= TIM_CCMR1_CC1S_0 | TIM_CCMR1_CC2S_1; /* (1)*/
|
||||
TIM2->SMCR |= TIM_SMCR_TS_2 | TIM_SMCR_TS_0 | TIM_SMCR_SMS_2; /* (2) */
|
||||
TIM2->CCER |= TIM_CCER_CC1E | TIM_CCER_CC2E | TIM_CCER_CC2P; /* (3) */
|
||||
TIM2->DIER |= TIM_DIER_CC1IE; /* (4) */
|
||||
TIM2->CR1 |= TIM_CR1_CEN; /* (5) */
|
||||
NVIC_EnableIRQ(TIM2_IRQn);
|
||||
}
|
||||
|
||||
void TIM3_Init(void) { //configure IN1 as Iddle input PB4 TIM3
|
||||
// PB4 AF1 TIM3 Input1
|
||||
RCC->AHBENR |= RCC_AHBENR_GPIOBEN;
|
||||
// GPIOB->MODER &= ~(3 << (4 * 2));
|
||||
// GPIOB->MODER |= (2 << (4 * 2));
|
||||
// GPIOB->OTYPER &= ~(1 << 4 * 1);
|
||||
// GPIOB->OSPEEDR &= ~(3 << (4 * 2));
|
||||
// GPIOB->PUPDR &= ~(3 << (4 * 2));
|
||||
// GPIOB->AFR[0] &= ~(15 << (4 * 4));
|
||||
// GPIOB->AFR[0] |= (1 << (4 * 4));
|
||||
GPIOB->MODER &= ~(3 << (5 * 2));
|
||||
GPIOB->MODER |= (2 << (5 * 2));
|
||||
GPIOB->OTYPER &= ~(1 << (5 * 1));
|
||||
GPIOB->OSPEEDR &= ~(3 << (5 * 2));
|
||||
GPIOB->PUPDR &= ~(3 << (5 * 2));
|
||||
GPIOB->AFR[0] &= ~(15 << (5 * 4));
|
||||
GPIOB->AFR[0] |= (1 << (5 * 4));
|
||||
RCC->APB1ENR |= RCC_APB1ENR_TIM3EN;
|
||||
/* (1) Select the active input TI1 for TIM3_CCR1 (CC1S = 01),
|
||||
select the active input TI1 for TIM3_CCR2 (CC2S = 10) */
|
||||
/* (2) Select TI1FP1 as valid trigger input (TS = 101)
|
||||
configure the slave mode in reset mode (SMS = 100) */
|
||||
/* (3) Enable capture by setting CC1E and CC2E
|
||||
select the rising edge on CC1 and CC1N (CC1P = 0 and CC1NP = 0, reset
|
||||
value),
|
||||
select the falling edge on CC2 (CC2P = 1). */
|
||||
/* (4) Enable interrupt on Capture/Compare 1 */
|
||||
/* (5) Enable counter */
|
||||
TIM3->CCMR1 |= TIM_CCMR1_CC1S_1 | TIM_CCMR1_CC2S_0; /* (1)*/
|
||||
TIM3->SMCR |= TIM_SMCR_TS_2 | TIM_SMCR_TS_0 | TIM_SMCR_SMS_2; /* (2) */
|
||||
TIM3->CCER |= TIM_CCER_CC1E | TIM_CCER_CC2E | TIM_CCER_CC2P; /* (3) */
|
||||
TIM3->DIER |= TIM_DIER_CC1IE; /* (4) */
|
||||
TIM3->CR1 |= TIM_CR1_CEN; /* (5) */
|
||||
NVIC_EnableIRQ(TIM3_IRQn);
|
||||
}
|
||||
|
||||
void TIM6_Init(void) {
|
||||
// Init Timer 6
|
||||
RCC->APB1ENR |= RCC_APB1ENR_TIM6EN;
|
||||
TIM6->PSC = 479;
|
||||
TIM6->ARR = 2000;
|
||||
TIM6->CR1 |= 1 << 0 | 1 << 7;
|
||||
TIM6->CR2 = 0;
|
||||
TIM6->SMCR = 0;
|
||||
TIM6->DIER = 1 << 0;
|
||||
TIM6->CCMR1 = 0;
|
||||
TIM6->CCMR2 = 0;
|
||||
TIM6->CCER = 0x1111;
|
||||
TIM6->SR = 0;
|
||||
NVIC_EnableIRQ(TIM6_IRQn);
|
||||
}
|
||||
|
||||
void TIM7_Init(void) {
|
||||
// Init Timer 6
|
||||
RCC->APB1ENR |= RCC_APB1ENR_TIM7EN;
|
||||
TIM7->PSC = 4799;
|
||||
TIM7->ARR = 1000;
|
||||
TIM7->CR1 |= 1 << 0 | 1 << 7;
|
||||
TIM7->CR2 = 0;
|
||||
TIM7->SMCR = 0;
|
||||
TIM7->DIER = 1 << 0;
|
||||
TIM7->CCMR1 = 0;
|
||||
TIM7->CCMR2 = 0;
|
||||
TIM7->CCER = 0x1111;
|
||||
TIM7->SR = 0;
|
||||
NVIC_EnableIRQ(TIM7_IRQn);
|
||||
}
|
||||
|
||||
void TIM14_Init(void) {
|
||||
/* (1) Set prescaler to 47, so APBCLK/48 i.e 1MHz */
|
||||
/* (2) Set ARR = 8, as timer clock is 1MHz the period is 9 us */
|
||||
/* (3) Set CCRx = 4, , the signal will be high during 4 us */
|
||||
/* (4) Select PWM mode 1 on OC1 (OC1M = 110),
|
||||
enable preload register on OC1 (OC1PE = 1) */
|
||||
/* (5) Select active high polarity on OC1 (CC1P = 0, reset value),
|
||||
enable the output on OC1 (CC1E = 1)*/
|
||||
/* (6) Enable output (MOE = 1)*/
|
||||
/* (7) Enable counter (CEN = 1)
|
||||
select edge aligned mode (CMS = 00, reset value)
|
||||
select direction as upcounter (DIR = 0, reset value) */
|
||||
/* (8) Force update generation (UG = 1) */
|
||||
TIM14->PSC = 48 - 1; /* (1) */
|
||||
TIM14->ARR = 1000; /* (2) */
|
||||
TIM14->CCR1 = 500; /* (3) */
|
||||
TIM14->CCMR1 |= TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1
|
||||
| TIM_CCMR1_OC1PE; /* (4) */
|
||||
TIM14->CCER |= TIM_CCER_CC1E; /* (5) */
|
||||
TIM14->BDTR |= TIM_BDTR_MOE; /* (6) */
|
||||
TIM14->CR1 |= TIM_CR1_CEN; /* (7) */
|
||||
TIM14->EGR |= TIM_EGR_UG; /* (8) */
|
||||
}
|
||||
void TIM15_Init(void) { //configure IN1 as Iddle input PB4 TIM3
|
||||
// PB4 AF1 TIM3 Input1
|
||||
RCC->AHBENR |= RCC_AHBENR_GPIOBEN;
|
||||
GPIOB->MODER &= ~(3 << (14 * 2));
|
||||
GPIOB->MODER |= (2 << (14 * 2));
|
||||
GPIOB->OTYPER &= ~(1 << (14 * 1));
|
||||
GPIOB->OSPEEDR &= ~(3 << (4 * 2));
|
||||
GPIOB->PUPDR &= ~(3 << (4 * 2));
|
||||
GPIOB->AFR[0] &= ~(15 << (6 * 4));
|
||||
GPIOB->AFR[0] |= (1 << (6 * 4));
|
||||
RCC->APB2ENR |= RCC_APB2ENR_TIM15EN;
|
||||
/* (1) Select the active input TI1 for TIM3_CCR1 (CC1S = 01),
|
||||
select the active input TI1 for TIM3_CCR2 (CC2S = 10) */
|
||||
/* (2) Select TI1FP1 as valid trigger input (TS = 101)
|
||||
configure the slave mode in reset mode (SMS = 100) */
|
||||
/* (3) Enable capture by setting CC1E and CC2E
|
||||
select the rising edge on CC1 and CC1N (CC1P = 0 and CC1NP = 0, reset
|
||||
value),
|
||||
select the falling edge on CC2 (CC2P = 1). */
|
||||
/* (4) Enable interrupt on Capture/Compare 1 */
|
||||
/* (5) Enable counter */
|
||||
TIM15->CCMR1 |= TIM_CCMR1_CC1S_0 | TIM_CCMR1_CC2S_1; /* (1)*/
|
||||
TIM15->SMCR |= TIM_SMCR_TS_2 | TIM_SMCR_TS_0 | TIM_SMCR_SMS_2; /* (2) */
|
||||
TIM15->CCER |= TIM_CCER_CC1E | TIM_CCER_CC2E | TIM_CCER_CC2P; /* (3) */
|
||||
TIM15->DIER |= TIM_DIER_CC1IE; /* (4) */
|
||||
TIM15->CR1 |= TIM_CR1_CEN; /* (5) */
|
||||
NVIC_EnableIRQ(TIM15_IRQn);
|
||||
}
|
||||
|
||||
void TIM16_Init(void) {
|
||||
/* (1) Set prescaler to 47, so APBCLK/48 i.e 1MHz */
|
||||
/* (2) Set ARR = 8, as timer clock is 1MHz the period is 9 us */
|
||||
/* (3) Set CCRx = 4, , the signal will be high during 4 us */
|
||||
/* (4) Select PWM mode 1 on OC1 (OC1M = 110),
|
||||
enable preload register on OC1 (OC1PE = 1) */
|
||||
/* (5) Select active high polarity on OC1 (CC1P = 0, reset value),
|
||||
enable the output on OC1 (CC1E = 1)*/
|
||||
/* (6) Enable output (MOE = 1)*/
|
||||
/* (7) Enable counter (CEN = 1)
|
||||
select edge aligned mode (CMS = 00, reset value)
|
||||
select direction as upcounter (DIR = 0, reset value) */
|
||||
/* (8) Force update generation (UG = 1) */
|
||||
TIM16->PSC = 48 - 1; /* (1) */
|
||||
TIM16->ARR = 1000; /* (2) */
|
||||
TIM16->CCR1 = 500; /* (3) */
|
||||
TIM16->CCMR1 |= TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1
|
||||
| TIM_CCMR1_OC1PE; /* (4) */
|
||||
TIM16->CCER |= TIM_CCER_CC1E; /* (5) */
|
||||
TIM16->BDTR |= TIM_BDTR_MOE; /* (6) */
|
||||
TIM16->CR1 |= TIM_CR1_CEN; /* (7) */
|
||||
TIM16->EGR |= TIM_EGR_UG; /* (8) */
|
||||
}
|
||||
|
||||
void TIM17_Init(void) {
|
||||
/* (1) Set prescaler to 47, so APBCLK/48 i.e 1MHz */
|
||||
/* (2) Set ARR = 8, as timer clock is 1MHz the period is 9 us */
|
||||
/* (3) Set CCRx = 4, , the signal will be high during 4 us */
|
||||
/* (4) Select PWM mode 1 on OC1 (OC1M = 110),
|
||||
enable preload register on OC1 (OC1PE = 1) */
|
||||
/* (5) Select active high polarity on OC1 (CC1P = 0, reset value),
|
||||
enable the output on OC1 (CC1E = 1)*/
|
||||
/* (6) Enable output (MOE = 1)*/
|
||||
/* (7) Enable counter (CEN = 1)
|
||||
select edge aligned mode (CMS = 00, reset value)
|
||||
select direction as upcounter (DIR = 0, reset value) */
|
||||
/* (8) Force update generation (UG = 1) */
|
||||
TIM17->PSC = 48 - 1; /* (1) */
|
||||
TIM17->ARR = 1000; /* (2) */
|
||||
TIM17->CCR1 = 0; /* (3) */
|
||||
TIM17->CCMR1 |= TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1
|
||||
| TIM_CCMR1_OC1PE; /* (4) */
|
||||
TIM17->CCER |= TIM_CCER_CC1E; /* (5) */
|
||||
TIM17->BDTR |= TIM_BDTR_MOE; /* (6) */
|
||||
TIM17->CR1 |= TIM_CR1_CEN; /* (7) */
|
||||
TIM17->EGR |= TIM_EGR_UG; /* (8) */
|
||||
}
|
||||
|
||||
void TIM1_CC_IRQHandler(void) {
|
||||
if ((TIM1->SR & TIM_SR_CC1IF) != 0) {
|
||||
if ((TIM1->SR & TIM_SR_CC1OF) != 0) /* Check the overflow */
|
||||
{
|
||||
/* Overflow error management */
|
||||
/* Reinitialize the laps computing */
|
||||
TIM1->SR &= ~(TIM_SR_CC1OF | TIM_SR_CC1IF); /* Clear the flags */
|
||||
return;
|
||||
} else {
|
||||
var.dvi_fr[0] = TIM1->CCR1;
|
||||
var.dvi_dt[0] = (TIM1->CCR2) * 100 / var.dvi_fr[0]; //Get DC
|
||||
var.dvi_fr[0] = 48000000 / var.dvi_fr[0];
|
||||
// printf("data1 =%d; data2 =%d \n",counter0,counter1);
|
||||
}
|
||||
} else {
|
||||
/* Unexpected Interrupt */
|
||||
/* Manage an error for robust application */
|
||||
}
|
||||
}
|
||||
|
||||
void TIM2_IRQHandler(void) {
|
||||
var.tim2_timeout = 0;
|
||||
if ((TIM2->SR & TIM_SR_CC1IF) != 0) {
|
||||
if ((TIM2->SR & TIM_SR_CC1OF) != 0) {/* Check the overflow */
|
||||
|
||||
/* Overflow error management */
|
||||
/* Reinitialize the laps computing */
|
||||
TIM2->SR &= ~(TIM_SR_CC1OF | TIM_SR_CC1IF); /* Clear the flags */
|
||||
return;
|
||||
} else {
|
||||
var.dvi_fr[1] = TIM2->CCR1;
|
||||
var.dvi_dt[1] = (TIM2->CCR2) * 100 / var.dvi_fr[1]; //Get DC
|
||||
var.dvi_fr[1] = 48000000 / var.dvi_fr[1];
|
||||
// printf("data1 =%d; data2 =%d \n",counter0,counter1);
|
||||
}
|
||||
} else {
|
||||
var.dvi_dt[1] = 0xff00;
|
||||
var.dvi_fr[1] = 0;
|
||||
/* Unexpected Interrupt */
|
||||
/* Manage an error for robust application */
|
||||
}
|
||||
}
|
||||
|
||||
void TIM3_IRQHandler(void) {
|
||||
if ((TIM3->SR & TIM_SR_CC1IF) != 0) {
|
||||
if ((TIM3->SR & TIM_SR_CC1OF) != 0) /* Check the overflow */
|
||||
{
|
||||
/* Overflow error management */
|
||||
/* Reinitialize the laps computing */
|
||||
TIM3->SR &= ~(TIM_SR_CC1OF | TIM_SR_CC1IF); /* Clear the flags */
|
||||
return;
|
||||
} else {
|
||||
var.dvi_fr[2] = TIM3->CCR1;
|
||||
var.dvi_dt[2] = (TIM3->CCR2) * 1000 / var.dvi_fr[2]; //Get DC
|
||||
var.dvi_fr[2] = 48000000 / var.dvi_fr[2];
|
||||
// printf("data1 =%d; data2 =%d \n",counter0,counter1);
|
||||
}
|
||||
} else {
|
||||
/* Unexpected Interrupt */
|
||||
/* Manage an error for robust application */
|
||||
}
|
||||
}
|
||||
|
||||
void TIM6_DAC_IRQHandler(void) {
|
||||
TIM6->SR &= ~(1 << 0);
|
||||
//TIM2->CNT = 600;
|
||||
var.Send_Data_IRQ = 4;
|
||||
if (var.tim1_timeout < 254)
|
||||
var.tim1_timeout++;
|
||||
if (var.tim2_timeout < 254)
|
||||
var.tim2_timeout++;
|
||||
if (var.tim3_timeout < 254)
|
||||
var.tim3_timeout++;
|
||||
if (var.tim15_timeout < 254)
|
||||
var.tim15_timeout++;
|
||||
if (var.can_timeout < 254)
|
||||
var.can_timeout++;
|
||||
}
|
||||
|
||||
void TIM7_IRQHandler(void) {
|
||||
TIM7->SR &= ~(1 << 0);
|
||||
if (var.dvo_dt[3] == 0)
|
||||
HAL_GPIO_WritePin(GPIOA, GPIO_PIN_5, GPIO_PIN_RESET);
|
||||
else
|
||||
HAL_GPIO_WritePin(GPIOA, GPIO_PIN_5, GPIO_PIN_SET);
|
||||
}
|
||||
|
||||
void TIM15_IRQHandler(void) {
|
||||
if ((TIM15->SR & TIM_SR_CC1IF) != 0) {
|
||||
if ((TIM15->SR & TIM_SR_CC1OF) != 0) /* Check the overflow */
|
||||
{
|
||||
/* Overflow error management */
|
||||
/* Reinitialize the laps computing */
|
||||
TIM15->SR &= ~(TIM_SR_CC1OF | TIM_SR_CC1IF); /* Clear the flags */
|
||||
return;
|
||||
} else {
|
||||
var.dvi_fr[3] = TIM15->CCR1;
|
||||
var.dvi_dt[3] = (TIM15->CCR2) * 100 / TIM15->CCR1; //Get DC
|
||||
var.dvi_fr[3] = 48000000 / var.dvi_fr[3];
|
||||
// printf("data1 =%d; data2 =%d \n",counter0,counter1);
|
||||
}
|
||||
} else {
|
||||
/* Unexpected Interrupt */
|
||||
/* Manage an error for robust application */
|
||||
}
|
||||
}
|
||||
|
||||
294
Test2/Core/Startup/startup_stm32f072c8tx.s
Normal file
294
Test2/Core/Startup/startup_stm32f072c8tx.s
Normal file
@@ -0,0 +1,294 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file startup_stm32f072xb.s
|
||||
* @author MCD Application Team
|
||||
* @brief STM32F072x8/STM32F072xB devices vector table for GCC toolchain.
|
||||
* This module performs:
|
||||
* - Set the initial SP
|
||||
* - Set the initial PC == Reset_Handler,
|
||||
* - Set the vector table entries with the exceptions ISR address
|
||||
* - Branches to main in the C library (which eventually
|
||||
* calls main()).
|
||||
* After Reset the Cortex-M0 processor is in Thread mode,
|
||||
* priority is Privileged, and the Stack is set to Main.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
.syntax unified
|
||||
.cpu cortex-m0
|
||||
.fpu softvfp
|
||||
.thumb
|
||||
|
||||
.global g_pfnVectors
|
||||
.global Default_Handler
|
||||
|
||||
/* start address for the initialization values of the .data section.
|
||||
defined in linker script */
|
||||
.word _sidata
|
||||
/* start address for the .data section. defined in linker script */
|
||||
.word _sdata
|
||||
/* end address for the .data section. defined in linker script */
|
||||
.word _edata
|
||||
/* start address for the .bss section. defined in linker script */
|
||||
.word _sbss
|
||||
/* end address for the .bss section. defined in linker script */
|
||||
.word _ebss
|
||||
|
||||
.section .text.Reset_Handler
|
||||
.weak Reset_Handler
|
||||
.type Reset_Handler, %function
|
||||
Reset_Handler:
|
||||
ldr r0, =_estack
|
||||
mov sp, r0 /* set stack pointer */
|
||||
|
||||
/* Call the clock system initialization function.*/
|
||||
bl SystemInit
|
||||
|
||||
/* Copy the data segment initializers from flash to SRAM */
|
||||
ldr r0, =_sdata
|
||||
ldr r1, =_edata
|
||||
ldr r2, =_sidata
|
||||
movs r3, #0
|
||||
b LoopCopyDataInit
|
||||
|
||||
CopyDataInit:
|
||||
ldr r4, [r2, r3]
|
||||
str r4, [r0, r3]
|
||||
adds r3, r3, #4
|
||||
|
||||
LoopCopyDataInit:
|
||||
adds r4, r0, r3
|
||||
cmp r4, r1
|
||||
bcc CopyDataInit
|
||||
|
||||
/* Zero fill the bss segment. */
|
||||
ldr r2, =_sbss
|
||||
ldr r4, =_ebss
|
||||
movs r3, #0
|
||||
b LoopFillZerobss
|
||||
|
||||
FillZerobss:
|
||||
str r3, [r2]
|
||||
adds r2, r2, #4
|
||||
|
||||
LoopFillZerobss:
|
||||
cmp r2, r4
|
||||
bcc FillZerobss
|
||||
|
||||
/* Call static constructors */
|
||||
bl __libc_init_array
|
||||
/* Call the application's entry point.*/
|
||||
bl main
|
||||
|
||||
LoopForever:
|
||||
b LoopForever
|
||||
|
||||
|
||||
.size Reset_Handler, .-Reset_Handler
|
||||
|
||||
/**
|
||||
* @brief This is the code that gets called when the processor receives an
|
||||
* unexpected interrupt. This simply enters an infinite loop, preserving
|
||||
* the system state for examination by a debugger.
|
||||
*
|
||||
* @param None
|
||||
* @retval : None
|
||||
*/
|
||||
.section .text.Default_Handler,"ax",%progbits
|
||||
Default_Handler:
|
||||
Infinite_Loop:
|
||||
b Infinite_Loop
|
||||
.size Default_Handler, .-Default_Handler
|
||||
/******************************************************************************
|
||||
*
|
||||
* The minimal vector table for a Cortex M0. Note that the proper constructs
|
||||
* must be placed on this to ensure that it ends up at physical address
|
||||
* 0x0000.0000.
|
||||
*
|
||||
******************************************************************************/
|
||||
.section .isr_vector,"a",%progbits
|
||||
.type g_pfnVectors, %object
|
||||
.size g_pfnVectors, .-g_pfnVectors
|
||||
|
||||
|
||||
g_pfnVectors:
|
||||
.word _estack
|
||||
.word Reset_Handler
|
||||
.word NMI_Handler
|
||||
.word HardFault_Handler
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word SVC_Handler
|
||||
.word 0
|
||||
.word 0
|
||||
.word PendSV_Handler
|
||||
.word SysTick_Handler
|
||||
.word WWDG_IRQHandler /* Window WatchDog */
|
||||
.word PVD_VDDIO2_IRQHandler /* PVD and VDDIO2 through EXTI Line detect */
|
||||
.word RTC_IRQHandler /* RTC through the EXTI line */
|
||||
.word FLASH_IRQHandler /* FLASH */
|
||||
.word RCC_CRS_IRQHandler /* RCC and CRS */
|
||||
.word EXTI0_1_IRQHandler /* EXTI Line 0 and 1 */
|
||||
.word EXTI2_3_IRQHandler /* EXTI Line 2 and 3 */
|
||||
.word EXTI4_15_IRQHandler /* EXTI Line 4 to 15 */
|
||||
.word TSC_IRQHandler /* TSC */
|
||||
.word DMA1_Channel1_IRQHandler /* DMA1 Channel 1 */
|
||||
.word DMA1_Channel2_3_IRQHandler /* DMA1 Channel 2 and Channel 3 */
|
||||
.word DMA1_Channel4_5_6_7_IRQHandler /* DMA1 Channel 4, Channel 5, Channel 6 and Channel 7*/
|
||||
.word ADC1_COMP_IRQHandler /* ADC1, COMP1 and COMP2 */
|
||||
.word TIM1_BRK_UP_TRG_COM_IRQHandler /* TIM1 Break, Update, Trigger and Commutation */
|
||||
.word TIM1_CC_IRQHandler /* TIM1 Capture Compare */
|
||||
.word TIM2_IRQHandler /* TIM2 */
|
||||
.word TIM3_IRQHandler /* TIM3 */
|
||||
.word TIM6_DAC_IRQHandler /* TIM6 and DAC */
|
||||
.word TIM7_IRQHandler /* TIM7 */
|
||||
.word TIM14_IRQHandler /* TIM14 */
|
||||
.word TIM15_IRQHandler /* TIM15 */
|
||||
.word TIM16_IRQHandler /* TIM16 */
|
||||
.word TIM17_IRQHandler /* TIM17 */
|
||||
.word I2C1_IRQHandler /* I2C1 */
|
||||
.word I2C2_IRQHandler /* I2C2 */
|
||||
.word SPI1_IRQHandler /* SPI1 */
|
||||
.word SPI2_IRQHandler /* SPI2 */
|
||||
.word USART1_IRQHandler /* USART1 */
|
||||
.word USART2_IRQHandler /* USART2 */
|
||||
.word USART3_4_IRQHandler /* USART3 and USART4 */
|
||||
.word CEC_CAN_IRQHandler /* CEC and CAN */
|
||||
.word USB_IRQHandler /* USB */
|
||||
|
||||
/*******************************************************************************
|
||||
*
|
||||
* Provide weak aliases for each Exception handler to the Default_Handler.
|
||||
* As they are weak aliases, any function with the same name will override
|
||||
* this definition.
|
||||
*
|
||||
*******************************************************************************/
|
||||
|
||||
.weak NMI_Handler
|
||||
.thumb_set NMI_Handler,Default_Handler
|
||||
|
||||
.weak HardFault_Handler
|
||||
.thumb_set HardFault_Handler,Default_Handler
|
||||
|
||||
.weak SVC_Handler
|
||||
.thumb_set SVC_Handler,Default_Handler
|
||||
|
||||
.weak PendSV_Handler
|
||||
.thumb_set PendSV_Handler,Default_Handler
|
||||
|
||||
.weak SysTick_Handler
|
||||
.thumb_set SysTick_Handler,Default_Handler
|
||||
|
||||
.weak WWDG_IRQHandler
|
||||
.thumb_set WWDG_IRQHandler,Default_Handler
|
||||
|
||||
.weak PVD_VDDIO2_IRQHandler
|
||||
.thumb_set PVD_VDDIO2_IRQHandler,Default_Handler
|
||||
|
||||
.weak RTC_IRQHandler
|
||||
.thumb_set RTC_IRQHandler,Default_Handler
|
||||
|
||||
.weak FLASH_IRQHandler
|
||||
.thumb_set FLASH_IRQHandler,Default_Handler
|
||||
|
||||
.weak RCC_CRS_IRQHandler
|
||||
.thumb_set RCC_CRS_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI0_1_IRQHandler
|
||||
.thumb_set EXTI0_1_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI2_3_IRQHandler
|
||||
.thumb_set EXTI2_3_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI4_15_IRQHandler
|
||||
.thumb_set EXTI4_15_IRQHandler,Default_Handler
|
||||
|
||||
.weak TSC_IRQHandler
|
||||
.thumb_set TSC_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel1_IRQHandler
|
||||
.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel2_3_IRQHandler
|
||||
.thumb_set DMA1_Channel2_3_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel4_5_6_7_IRQHandler
|
||||
.thumb_set DMA1_Channel4_5_6_7_IRQHandler,Default_Handler
|
||||
|
||||
.weak ADC1_COMP_IRQHandler
|
||||
.thumb_set ADC1_COMP_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_BRK_UP_TRG_COM_IRQHandler
|
||||
.thumb_set TIM1_BRK_UP_TRG_COM_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_CC_IRQHandler
|
||||
.thumb_set TIM1_CC_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM2_IRQHandler
|
||||
.thumb_set TIM2_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM3_IRQHandler
|
||||
.thumb_set TIM3_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM6_DAC_IRQHandler
|
||||
.thumb_set TIM6_DAC_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM7_IRQHandler
|
||||
.thumb_set TIM7_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM14_IRQHandler
|
||||
.thumb_set TIM14_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM15_IRQHandler
|
||||
.thumb_set TIM15_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM16_IRQHandler
|
||||
.thumb_set TIM16_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM17_IRQHandler
|
||||
.thumb_set TIM17_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C1_IRQHandler
|
||||
.thumb_set I2C1_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C2_IRQHandler
|
||||
.thumb_set I2C2_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI1_IRQHandler
|
||||
.thumb_set SPI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI2_IRQHandler
|
||||
.thumb_set SPI2_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART1_IRQHandler
|
||||
.thumb_set USART1_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART2_IRQHandler
|
||||
.thumb_set USART2_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART3_4_IRQHandler
|
||||
.thumb_set USART3_4_IRQHandler,Default_Handler
|
||||
|
||||
.weak CEC_CAN_IRQHandler
|
||||
.thumb_set CEC_CAN_IRQHandler,Default_Handler
|
||||
|
||||
.weak USB_IRQHandler
|
||||
.thumb_set USB_IRQHandler,Default_Handler
|
||||
|
||||
|
||||
|
||||
Reference in New Issue
Block a user